Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Theo Kluter, Samuel Burri, Philip Brisk, Edoardo Charbon, Paolo Ienne
2014 ACM Transactions on Architecture and Code Optimization (TACO)  
Instruction set extensions (ISEs) improve the performance and energy consumption of application-specific processors. ISEs can use architecturally visible storage (AVS), localized compiler-controlled memories, to provide higher I/O bandwidth than reading data from the processor pipeline. AVS creates coherence and consistence problems with the data cache. Although a hardware coherence protocol could solve the problem, this approach is costly for a single-processor system. As a low-cost
more » ... , we introduce Virtual Ways, which ensures coherence through a reduced form of inclusion between the data cache and AVS. Virtual Ways achieve higher performance and lower energy consumption than using a hardware coherence protocol.
doi:10.1145/2576877 fatcat:bsxmdyu5yne4fgqsozlaopnd3u