Automatic Integrated Circuit Die Positioning in the Scanning Electron Microscope

H. W. Tan, J. C. H. Phang, J. T. L. Thong
2006 Scanning  
In scanning electron microscope (SEM)-based integrated circuit (IC) failure analysis, there is often a need for manual location of a prespecified failure site in several ICs. Such a procedure is both tedious and time consuming. This paper presents a new vision-based die positioning system that can automatically locate a specified failure site without the need for a high-accuracy specimen stage. Depending on the appearance of the desired failure site, the system applies either image registration
more » ... or feature tracking to locate the site. Experiments performed on a variety of IC samples show that the system is able to locate the failure site accurately, even in the presence of unfavorable conditions such as IC sample rotation and repetitive IC patterns.
doi:10.1002/sca.4950240206 fatcat:hbyqxqxrt5eznbvra7w57yqfjy