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The current convergence process in wireless technologies demands for strong efforts in the conceiving of highly flexible and interoperable equipments. This contribution focuses on one of the most important baseband processing units in wireless receivers, the forward error correction unit, and proposes a Network-on-Chip (NoC) based approach to the design of multi-standard decoders. High level modeling is exploited to drive the NoC optimization for a given set of both turbo anddoi:10.1109/date.2012.6176715 dblp:conf/date/CondoMM12 fatcat:nvvy4hpeljd4vovg2bg337qdsa