Highly Linear 2.5-V CMOS>tex<$Sigma Delta $>/textex<$hboxADSL+$>/tex<

R. delRio, J.M. delaRosa, B. Perez-Verdu, M. Delgado-Restituto, R. Dominguez-Castro, F. Medeiro, A. Rodriguez-Vazquez
2004 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
We present a 90-dB spurious-free dynamic range sigma-delta modulator (61M) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) multibit architecture and has been implemented in a 2.5-V supply, 0.25-m CMOS process with metal-insulator-metal capacitors. The prototypes feature 78-dB dynamic range (DR) in the 30-kHz to 2.2-MHz band (ADSL+) and 85-dB DR in the 30-kHz to 1.1-MHz band (ADSL). Integral and
more » ... ntial nonlinearity are within 0.85 and 0.80 LSB 14 b , respectively. The 61 modulator and its auxiliary blocks (clock phase and reference voltage generators, and I/O buffers) dissipate 65.8 mW. Only 55 mW are dissipated in the 61 modulator.
doi:10.1109/tcsi.2003.821308 fatcat:e3z4pgfgsjbkdko6l5wnjhkvaq