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IPPro: FPGA based image processing processor
2014
2014 IEEE Workshop on Signal Processing Systems (SiPS)
the paper presents IPPro which is a high performance, scalable soft-core processor targeted for image processing applications. It has been based on the Xilinx DSP48E1 architecture using the ZYNQ Field Programmable Gate Array and is a scalar 16-bit RISC processor that operates at 526MHz, giving 526MIPS of performance. Each IPPro core uses 1 DSP48, 1 Block RAM and 330 Kintex-7 slice-registers, thus making the processor as compact as possible whilst maintaining flexibility and programmability. A
doi:10.1109/sips.2014.6986057
dblp:conf/sips/SiddiquiRBWR14
fatcat:udgld6xz7be4jogbdyglzbhehy