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We implement and experimentally evaluate the timeliness and energy consumption behaviors of fourteen state-of-the-art Real-Time Dynamic Voltage and Frequency Scaling (RT-DVFS) schedulers on two hardware platforms. The schedulers include CC-EDF, LA-EDF, REUA, DRA, and AGR1, among others, and the hardware platforms include the Intel i5 processor and the AMD Zacate processor. We implemented the schedulers in a real-time Linux kernel and measured their timeliness and energy consumption under adoi:10.1145/2367589.2367604 dblp:conf/systor/SahaR12 fatcat:p44bnlekp5dhjhhzvyc3nkun3q