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On-die parameter extraction from path-delay measurements
2009
2009 IEEE Asian Solid-State Circuits Conference
Device-parameter estimation through path-delay measurement, which facilitates fast on-die performance prediction and diagnosis, is proposed. With the proposed technique, delays of a set of paths consisting of different logic cells are monitored. Based on the pre-characterized parameter to delay sensitivity, the process variation of a chip is estimated as an inverse problem. Discussion of desirable logic cell combination to form paths that maximize estimation accuracy is presented. Measurement
doi:10.1109/asscc.2009.5357189
fatcat:6gccb66rfvgl3m6jfnno3ygw3y