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<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/vht4ijbhazhhjbamnn273zfk6a" style="color: black;">Sixteenth International Symposium on Quality Electronic Design</a>
Digital systems have numerous advantages over analog systems including robustness, resiliency against operational variations. However, one of the most popular hardware security primitive, PUF, has been an analog component. In this paper, we propose the concept of digital PUF where the core idea is to intentionally use high-risk synthesis to induce defects in circuits. Due to the effect of process variation, each manufactured digital implementation is unique with high probability. Compared to<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isqed.2015.7085467">doi:10.1109/isqed.2015.7085467</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/isqed/XuP15.html">dblp:conf/isqed/XuP15</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ncqonwahsfeoxedjipiscrvobq">fatcat:ncqonwahsfeoxedjipiscrvobq</a> </span>
more »... traditional delay based PUF, the induced defects in circuit are permanent defects that guarantee the fault-based digital PUF resilient against operational variations. Meanwhile, our proposed design takes advantage of the digital functionality of the circuits, thus, easy to be integrated with digital logic. We experiment on the standard array multiplier module. Our standard security analysis indicates ideal security properties of the digital PUF.
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