gm Based CMOS LNA Linearization Techniques – A Comparison
This paper proposes gm based CMOS LNA linearization techniques. A common source Cascode LNA with source degeneration is used as a base circuit operating on 0.8 to 2.5 GHz frequency range using TSMC 180nm technology and 1.8V supply. Linearization techniques i)Harmonic Termination, ii) Derivative Superposition, iii) complementary DS and iv) Post distortion are discussed and implemented on casode LNA. Comparison of results shows that IIP3 is improved by 17.8 dBm for Harmonic Termination, 10.7 dBm
... mination, 10.7 dBm for Derivative Superposition, 8.5 dBm for Complementary DS and 20.2 dBm for Post Distortion technique. Introduction The 21st Century communication technology has been predominantly wireless in nature and has resulted in numerous standards spanned over closely spaced frequencies governing different applications . An LNA is an important block in a wireless receiver and critical for enabling robust performance in obstructed environments. The image signal is produced in the non-linear devices because of the cross terms. This image signal dominates the minimum detectable signal at the receiver of the system. In such a situation, minimum detectable signal performance cannot be improved by bringing down Noise Figure of the system. The low-noise amplifier (LNA) has to provide high linearity preventing the interfering inter-modulation tones from corrupting the carrier signal. Improvise in linearity must not be at the cost of gain or NF. This requires the use of linearization techniques without much cost . The organization of the paper is as follows. Section II reports the Common source Cascode LNA and its implementation. Section III discusses the linearization techniques used in this paper with the simulation results and section IV concludes the paper. Cascode Common source LNA design: The complete schematic of cascode LNA consisting common source stage is shown in figure 1. Common source stage is also called as the Simultaneous Noise and Input Matching (SNIM) technique, as it matches input impedance and also provides low NF for the operation of the circuit. As shown in figure 1, transistor M1 and M2 act as LNA core. Inductances L1, L2 and capacitor C1 are utilized for broadband impedance matching. Capacitor Cg is connected to reduce the value of inductances in the matching network. Inductor Ls is used for feedback and also serves input matching.