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Hardware description language (HDL) Verilog has been standardized and widely used in industry. To describe the features such as event-driven computation, time and sharedvariable concurrency of hardware, a Verilog-like language MDESL (multithreaded discrete event simulation language), has been introduced. In this paper, we put forward a proof system for MDESL which is based on the classical Hoare Logic (precondition, program, postcondition). To deal with the guard statement, we add a new elementdoi:10.15439/2017f400 dblp:conf/fedcsis/LuXZF17 fatcat:ajq4umfcafhhjlf5ibq5buisea