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A machine learning-based approach for thread mapping on transactional memory applications
2011
2011 18th International Conference on High Performance Computing
Thread mapping has been extensively used as a technique to efficiently exploit memory hierarchy on modern chip-multiprocessors. It places threads on cores in order to amortize memory latency and/or to reduce memory contention. However, efficient thread mapping relies upon matching application behavior with system characteristics. Particularly, Software Transactional Memory (STM) applications introduce another dimension due to its runtime system support. Existing STM systems implement several
doi:10.1109/hipc.2011.6152736
dblp:conf/hipc/CastroGRCCM11
fatcat:nmyzav4kvjbeth2wht4kngmc5i