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Configurable Multi-directional Systolic Array Architecture for Convolutional Neural Networks
ACM Transactions on Architecture and Code Optimization (TACO)
The systolic array architecture is one of the most popular choices for convolutional neural network hardware accelerators. The biggest advantage of the systolic array architecture is its simple and efficient design principle. Without complicated control and dataflow, hardware accelerators with the systolic array can calculate traditional convolution very efficiently. However, this advantage also brings new challenges to the systolic array. When computing special types of convolution, such asdoi:10.1145/3460776 fatcat:lnae5l5oo5bozout4hnuasrbaa