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Studies in Computational Intelligence
Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures require efficient programming models and tools to deal with the massive parallelism present within the architecture. In this paper, we propose a tool which automates the generation of the System-Level Architecture Model (S-LAM) from a Unified Modeling Language-based (UML) model annotated with the Modeling and Analysis of Real-Time and Embedded Systems (MARTE) profile. The S-LAMbased description of the MP2SoC architecturedoi:10.1007/978-3-319-23509-7_14 fatcat:vaiwdsuhuvcejjuw6bptlw3jwu