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Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current
2010
2010 IEEE International Conference on Integrated Circuit Design and Technology
A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current
doi:10.1109/icicdt.2010.5510271
fatcat:tnqy56aeyrdrfoib4uturluz7e