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Algebraic Modeling of New Enhanced Linearity Threshold Comparator based Flash ADC
2014
IOSR Journal of VLSI and Signal processing
This paper describes flash ADC design using linearity improved threshold quantized comparator. Here, the need for a reference voltage generation network has been eliminated in a 4 bit flash ADC; with completely digital cell based comparators. Output generated from comparator called thermometer code is related mathematically with binary conversion. This conversion property is used for mathematical modeling and complexity reduction of decoder circuitry by semi-parallel structuring of comparators.
doi:10.9790/4200-04621119
fatcat:pqtjngsdjrbbdb5phms55y7hxi