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2014 International SoC Design Conference (ISOCC)
This paper presents a sensor node processor (SNP) with optimized energy efficiency and performance for intelligent sensing through architecture-level optimization and ultra-low voltage operation with timing-error monitoring. Two typical intelligent sensing applications are demonstrated with the proposed processor, consuming 39 and 29pJ/cycle at 0.5V respectively. I.doi:10.1109/isocc.2014.7087600 fatcat:x2asueiidvagnctp2shc62jc3y