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MIMD synchronization on SIMT architectures
2016
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
In the single-instruction multiple-threads (SIMT) execution model, small groups of scalar threads operate in lockstep. Within each group, current SIMT hardware implementations serialize the execution of threads that follow different paths, and to ensure efficiency, revert to lockstep execution as soon as possible. These constraints must be considered when adapting algorithms that employ synchronization. A deadlockfree program on a multiple-instruction multiple-data (MIMD) architecture may
doi:10.1109/micro.2016.7783714
dblp:conf/micro/ElTantawyA16
fatcat:boartlf4yvft5cfi6odao3negu