A Basic Study on Hardware Implementation of SOM Learning Algorithm by using High-level Synthesis Method
高位合成による SOM 学習アルゴリズムのハードウェア実装に関する基礎的研究

Satoru KATO, Yoshiki KOBAYASHI
2019
In a conventional way for Hardware implementation of neural networks (including SOM), we should transform a biological neuron model into logic-circuit structure and then circuit compiler translates the hardware description into an actual circuit which is built in FPGA. In recent years, circuit compilers can synthesize target logic circuits from a description of the processing algorithm immediately. This method is called "High-level Synthesis (HLS)" and it is used for hardware implementation of
more » ... eep neural networks such as CNN. In this paper, we present a practical example of the implementation of the SOM learning algorithm by using HLS method.
doi:10.14864/fss.35.0_288 fatcat:zyukrkqpxzdj3ifjpafnbwrhja