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In this brief, Design of low-power 8-bit shift register is done by using flip-flop (FF) design featuring an explicit type pulse-triggered structure based on a signal feed-through scheme is presented. The proposed design successfully solves the long discharging path problem in conventional explicit type pulse-triggered FF (P-FF) designs and achieves better speed and power performance. Using 8-bits of PFF 8-Bit shift register is designed. Based on post-layout simulation results using TSMC CMOSdoi:10.22259/ijeert.0501005 fatcat:zdelodswrvbavft2r7d2wcmdqa