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x86-TSO

Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, Magnus O. Myreen
2010 Communications of the ACM  
We present a new x86-TSO programmer's model that, to the best of our knowledge, suffers from none of these problems.  ...  We illustrate how this can be used to reason about the correctness of a Linux spinlock implementation and describe a general theory of data-race-freedom for x86-TSO.  ...  Acknowledgements We thank Luc Maranget for his work on memevents and litmus, Tom Ridge, Thomas Braibant and Jade Alglave for their other work on the project, and Hans Boehm, David Christie, Dave Dice,  ... 
doi:10.1145/1785414.1785443 fatcat:i7av63m3zzhivdof7j6brqc6om

Clarifying and compiling C/C++ concurrency

Mark Batty, Kayvan Memarian, Scott Owens, Susmit Sarkar, Peter Sewell
2012 SIGPLAN notices  
The upcoming C and C++ revised standards add concurrency to the languages, for the first time, in the form of a subtle relaxed memory model (the C++11 model).  ...  In this paper, we first establish two simpler but provably equivalent models for C++11, one for the full language and another for the subset without consume operations.  ...  Acknowledgements We thank Hans Boehm, Paul McKenney, JaroslavŠevčík, and Francesco Zappa Nardelli for discussions on this work, and acknowledge funding from EPSRC grants EP/F036345, EP/H005633, and EP/  ... 
doi:10.1145/2103621.2103717 fatcat:63v7vwwt6vahpdffcdcxaahesa

Clarifying and compiling C/C++ concurrency

Mark Batty, Kayvan Memarian, Scott Owens, Susmit Sarkar, Peter Sewell
2012 Proceedings of the 39th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '12  
The upcoming C and C++ revised standards add concurrency to the languages, for the first time, in the form of a subtle relaxed memory model (the C++11 model).  ...  In this paper, we first establish two simpler but provably equivalent models for C++11, one for the full language and another for the subset without consume operations.  ...  Acknowledgements We thank Hans Boehm, Paul McKenney, JaroslavŠevčík, and Francesco Zappa Nardelli for discussions on this work, and acknowledge funding from EPSRC grants EP/F036345, EP/H005633, and EP/  ... 
doi:10.1145/2103656.2103717 dblp:conf/popl/BattyMOSS12 fatcat:if5wozkscjdond33wzik3dar5q

Modelling the ARMv8 architecture, operationally: concurrency and ISA

Shaked Flur, Kathryn E. Gray, Christopher Pulte, Susmit Sarkar, Ali Sezgin, Luc Maranget, Will Deacon, Peter Sewell
2016 Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages - POPL 2016  
In this paper we develop semantics for key aspects of the ARMv8 multiprocessor architecture: the concurrency model and much of the 64-bit application-level instruction set (ISA).  ...  We validate the models by discussion with ARM staff, and by comparison against ARM hardware behaviour, for ISA singleinstruction tests and concurrent litmus tests.  ...  Acknowledgments We thank Graeme Barnes and Richard Grisenthwaite for discussions about the ARM architecture.  ... 
doi:10.1145/2837614.2837615 dblp:conf/popl/FlurGPSSMDS16 fatcat:pwbco6244raczm6x2auwwi3524

Modelling the ARMv8 architecture, operationally: concurrency and ISA

Shaked Flur, Kathryn E. Gray, Christopher Pulte, Susmit Sarkar, Ali Sezgin, Luc Maranget, Will Deacon, Peter Sewell
2016 SIGPLAN notices  
In this paper we develop semantics for key aspects of the ARMv8 multiprocessor architecture: the concurrency model and much of the 64-bit application-level instruction set (ISA).  ...  We validate the models by discussion with ARM staff, and by comparison against ARM hardware behaviour, for ISA singleinstruction tests and concurrent litmus tests.  ...  Acknowledgments We thank Graeme Barnes and Richard Grisenthwaite for discussions about the ARM architecture.  ... 
doi:10.1145/2914770.2837615 fatcat:nte3phwghzgllescf4xrg5rv4q

Studying Operational Models of Relaxed Concurrency [chapter]

Gustavo Petri
2014 Lecture Notes in Computer Science  
Moreover, γ is a computation of the calculus with buffers. * − → C such that for all t ∈ T id then γ| t ∝ M G γ | t = γ [t] . And in particular γ is a computation of the calculus with buffers. Proof.  ...  Figure 5) , γ : C * − → C is a computation of the merge-calculus. * − → C such that for all t ∈ T id , γ | t ∝ M G γ | t .  ...  Myreen. x86-TSO: a Rigorous and Usable Programmer's Model for x86 Multiprocessors. CACM, 53(7):89-97, 2010. 20. Inc. CORPORATE. SPARC. The SPARC Architecture Manual (version 9).  ... 
doi:10.1007/978-3-319-14128-2_15 fatcat:2v2zxmsy2nbkrcpz2cnxfn535y

A Load-Buffer Semantics for Total Store Ordering [article]

Parosh Aziz Abdulla, Mohamed Faouzi Atig, Ahmed Bouajjani, Tuan Phong Ngo
2017 arXiv   pre-print
to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient  ...  Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed.  ...  Nardelli, and M. O. Myreen. x86-tso: A rigorous and usable programmer's model for x86 multiprocessors. CACM, 53, 2010.  ... 
arXiv:1701.08682v3 fatcat:jrtmynu2cndzzgf2mt2mpdndfq

Studying Operational Models of Relaxed Concurrency [chapter]

Gustavo Petri
2014 Lecture Notes in Computer Science  
Moreover, γ is a computation of the calculus with buffers. * − → C such that for all t ∈ T id then γ| t ∝ M G γ | t = γ [t] . And in particular γ is a computation of the calculus with buffers. Proof.  ...  Figure 5) , γ : C * − → C is a computation of the merge-calculus. * − → C such that for all t ∈ T id , γ | t ∝ M G γ | t .  ...  Myreen. x86-TSO: a Rigorous and Usable Programmer's Model for x86 Multiprocessors. CACM, 53(7):89-97, 2010. 20. Inc. CORPORATE. SPARC. The SPARC Architecture Manual (version 9).  ... 
doi:10.1007/978-3-319-05119-2_15 fatcat:ovyoogragjcnvnmpn4jj7dh6s4

Multi-Core Memory Models and Concurrency Theory (Dagstuhl Seminar 11011) Feature-Oriented Software Development (FOSD) (Dagstuhl Seminar 11021) Multimodal Music Processing (Dagstuhl Seminar 11041) Learning from the Past: Implications for the Future Internet and its Management? (Dagstuhl Seminar 11042) Sparse Representations and Efficient Sensing of Data (Dagstuhl Seminar 11051)

Hans Boehm, Ursula Goltz, Holger Hermanns, Peter Sewell, Sven Apel, William Cook, Krzysztof Czarnecki, Oscar, Zhenjiang Hu, Andy Schürr, Perdita Stevens, James (+12 others)
2011 unpublished
Models for Mainstream Hardware A basic question is that of establishing usable and rigorous models for today's mainstream multiprocessors, which include ARM, Itanium, Power, Sparc, x86, and IBM zSeries  ...  We present a new x86-TSO programmer's model that, to the best of our knowledge, suffers from none of these problems.  ...  This modeling can take many forms and shapes: it can be done in a low-level way that ties the data samples directly or in higher levels that search for structures and constellations.  ... 
fatcat:qb35y6bggbe5fajaxnhn6mv72e