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Readers Are Parallel Processors

Joshua Snell, Jonathan Grainger
<span title="2019-05-25">2019</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2gvktplqc5gm7mwsea6qgdwy4m" style="color: black;">Trends in Cognitive Sciences</a> </i> &nbsp;
A case is made for parallelism, along with new methods to infer the cognitive architecture driving reading.  ...  Here we argue that no conclusions can be drawn from the absence of such effects, and that the serial versus parallel processing debate cannot be resolved without treading beyond the methodological scope  ...  processors.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.tics.2019.04.006">doi:10.1016/j.tics.2019.04.006</a> <a target="_blank" rel="external noopener" href="https://www.ncbi.nlm.nih.gov/pubmed/31138515">pmid:31138515</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/e2kvzv2hq5b2lpf5rgdxvw3jqi">fatcat:e2kvzv2hq5b2lpf5rgdxvw3jqi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200509174103/https://hal.archives-ouvertes.fr/hal-02447614/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/8f/19/8f19fee7154aef5051ef57a4bf0654af6a890893.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.tics.2019.04.006"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> elsevier.com </button> </a>

Measuring parallel processor performance

Alan H. Karp, Horace P. Flatt
<span title="1990-05-01">1990</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/i6iajiiyxvgz3ob6jwcn2pufni" style="color: black;">Communications of the ACM</a> </i> &nbsp;
Many metrics are used for measuring the performance of a parallel algorithm running on a parallel processor. This article introduces a new metric that has some advantages over the others.  ...  There are many ways to measure the performance of a parallel algorithm running on a parallel processor.  ...  However, large jobs usually have very long vectors, vector processors usually have only a few processors (the Intel IPSC-VX is an exception), and there are usually parallelizations that keep the vector  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/78607.78614">doi:10.1145/78607.78614</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/r6n7uvz275e6ni5llafefz7rum">fatcat:r6n7uvz275e6ni5llafefz7rum</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809144227/http://www.cs.utsa.edu/faculty/boppana/courses/pproc-common/papers/speedup-karp-flatt-cacm90.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/7f/95/7f95139e4f3d0eb3e024ce1f7f440fb1427ee133.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/78607.78614"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Fault-tolerant parallel processor

RICHARD E. HARPER, JAYNARAYAN H. LALA
<span title="">1991</span> <i title="American Institute of Aeronautics and Astronautics (AIAA)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yekwqy6srncl5bew6tynp7vjsq" style="color: black;">Journal of Guidance Control and Dynamics</a> </i> &nbsp;
GUIDANCE Fig. 4 192-PE fault-tolerant parallel processor.  ...  Two prototype fault-tolerant parallel processor clusters, a 16-processor version and a 4-processor version, have been completed.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.20675">doi:10.2514/3.20675</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/fgdsh6wdfjhv3c3uelg2gbmoli">fatcat:fgdsh6wdfjhv3c3uelg2gbmoli</a> </span>
<a target="_blank" rel="noopener" href="https://archive.org/details/sim_journal-of-guidance-control-and-dynamics_may-june-1991_14_3/page/554" title="read fulltext microfilm" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Archive [Microfilm] <div class="menu fulltext-thumbnail"> <img src="https://archive.org/serve/sim_journal-of-guidance-control-and-dynamics_may-june-1991_14_3/__ia_thumb.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.20675"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Content addressable parallel processors

B. Parhami
<span title="">1978</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yfvtieuumfamvmjlc255uckdlm" style="color: black;">Proceedings of the IEEE</a> </i> &nbsp;
The book starts with a short introductory chapter, "What is a Content Addressable Parallel Processor and Who Needs One?"  ...  in the design of an associative fde processor [2].  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/proc.1978.11070">doi:10.1109/proc.1978.11070</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/wl6sg4l6trbsxniqdydv2cjzs4">fatcat:wl6sg4l6trbsxniqdydv2cjzs4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180724073205/https://ieeexplore.ieee.org/ielx5/5/31268/01455339.pdf?tp=&amp;arnumber=1455339&amp;isnumber=31268" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/81/5b/815b0407ebb615bfcbd7f006acdd6c0ab06b8239.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/proc.1978.11070"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

The Massively Parallel Processor

D.H. Schaefer, J.R. Fischer, K.R. Wallgren
<span title="">1982</span> <i title="American Institute of Aeronautics and Astronautics (AIAA)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/yekwqy6srncl5bew6tynp7vjsq" style="color: black;">Journal of Guidance Control and Dynamics</a> </i> &nbsp;
Therefore much of parallel programming in FORTH can be viewed as describing what one processor does --it just happens to be happening on 16,384 processors.  ...  The most interesting aspect of the MPP is obviously the array of processors, but the aspect of the MPP which really makes the efficient nature of the massively parallel architecture apparent is the parallelism  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.19770">doi:10.2514/3.19770</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/k5wcy7betjaozg3kgumyod3tq4">fatcat:k5wcy7betjaozg3kgumyod3tq4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809024446/http://soton.mpeforth.com/flag/jfar/vol5/no1/article3.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/1e/fe/1efea50dd671b31514ee7bfe30cde4284fa9c163.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.19770"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Climate modelling using parallel processors

S Dash
<span title="">1995</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/6564ouf3evhmfnxrs43zg7scgi" style="color: black;">Atmospheric Environment</a> </i> &nbsp;
The model at resoluuon T21 is also implemented on 16 processors (T800) of a parallel computer (CHIPPS) built m In&a.  ...  Results show that a T42 parallel model with nine levels in the vertical takes less than 36 elapsed minutes on 32 processors for 1 d mtegration.  ...  Based on the spectral data, the second phase of parallel computaUons on all the processors began at this stage.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/1352-2310(94)00292-s">doi:10.1016/1352-2310(94)00292-s</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/4dv4lsalcvcabgrwlqbd26abrm">fatcat:4dv4lsalcvcabgrwlqbd26abrm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809030331/http://eprint.iitd.ac.in/bitstream/2074/192/3/dashcli94.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/f2/5f/f25fdc73da81438fe869a6368683c4b4bb822509.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/1352-2310(94)00292-s"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

A Many-Core Parallelizing Processor

Katarzyna Porada
<span title="">2017</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/hfatt7tua5aatozu2id5rdeuti" style="color: black;">2017 International Conference on High Performance Computing &amp; Simulation (HPCS)</a> </i> &nbsp;
Keywords-many-core processor, out-of-order processor, parallelizing processor, determinism, VHDL prototype I.  ...  This paper presents a new many-core processor design to parallelize by hardware. The parallel run is built from a deterministic parallelization of the sequential trace, hence inheriting its order.  ...  A major challenge is to be able to exploit such distant parallelism. Based on this work, the Dali team designed a parallelizing many-core processor [7] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hpcs.2017.133">doi:10.1109/hpcs.2017.133</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/ieeehpcs/Porada17.html">dblp:conf/ieeehpcs/Porada17</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ew2q4hs4fjezdkerlkrizr7pke">fatcat:ew2q4hs4fjezdkerlkrizr7pke</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180723223944/https://hal.inria.fr/hal-01558374/file/Technical_report.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/19/e8/19e88a2d466503f39829ed6189acdbce0e4fc045.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hpcs.2017.133"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

In-Memory Data Parallel Processor

Daichi Fujiki, Scott Mahlke, Reetuparna Das
<span title="">2018</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/w47kezfuffdgvcobhv564rrlju" style="color: black;">Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS &#39;18</a> </i> &nbsp;
We combat this problem by proposing a programmable in-memory processor architecture and data-parallel programming framework.  ...  The efficiency of the proposed in-memory processor comes from two sources: massive parallelism and reduction in data movement.  ...  We develop a TensorFlow compiler that generates binary code for our in-memory data-parallel processor.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3173162.3173171">doi:10.1145/3173162.3173171</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/asplos/FujikiMD18.html">dblp:conf/asplos/FujikiMD18</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/vxzdd2jdqnbrdnlq4ypdsedkzm">fatcat:vxzdd2jdqnbrdnlq4ypdsedkzm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20181222164930/http://cccp.eecs.umich.edu:80/papers/fujiki-asplos18.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e6/29/e629e31f7fcbb8e0197f5f8d3d24f48f09d2d278.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3173162.3173171"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

STARAN parallel processor system hardware

Kenneth E. Batcher
<span title="">1974</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/4agqxjodzbejhgxmujtmvzj4t4" style="color: black;">Proceedings of the May 6-10, 1974, national computer conference and exposition on - AFIPS &#39;74</a> </i> &nbsp;
Each array module contains an assignment switch that connects its control inputs and data inputs and outputs to AP (associative processor) control or the PIa (parallel input/output) module.  ...  Fast fourier transform The Fast Fourier Transform (FFT) is a basic operation in digital signal processing which is being widely used in STARAN Parallel Processor System Hardware 409 the real-time processing  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1500175.1500260">doi:10.1145/1500175.1500260</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/afips/Batcher74.html">dblp:conf/afips/Batcher74</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/7f77ddcejrde5njbhk4x6siw4e">fatcat:7f77ddcejrde5njbhk4x6siw4e</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170818134944/https://www.computer.org/csdl/proceedings/afips/1974/5082/00/50820405.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/96/8a/968a82513372b60d4143c1524bdf5773cfc96acc.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1500175.1500260"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Processor-Oblivious Parallel Stream Computations

Julien Bernard, Jean-Louis Roch, Daouda Traore
<span title="">2008</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/f3hr4iv3tvhrldoukhnurnloh4" style="color: black;">16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008)</a> </i> &nbsp;
We introduce a new parallel algorithm called processor-oblivious: it is based on the coupling of a fast sequential algorithm with a fine-grain parallel one that is scheduled by work-stealing.  ...  We provide lower bounds for the parallel stream computation on p processors of different speeds with two models, a strict model and a buffered model; to our knowledge, these are new results.  ...  Theorem 2 The parallel time on p processors of a parallel buffered stream computation is lower bounded by: T p ≥ n Π ω C + ω O p + ω O ω C .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/pdp.2008.57">doi:10.1109/pdp.2008.57</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/pdp/BernardRT08.html">dblp:conf/pdp/BernardRT08</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/zsaebfsvt5hcpivqbcgpknk4k4">fatcat:zsaebfsvt5hcpivqbcgpknk4k4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170812010808/http://moais.imag.fr/membres/jean-louis.roch/perso_html/papers/2008-PDP-processor-oblivious-parallel-stream.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/5a/e9/5ae932e7d268be9abdaf99b9973748302068b410.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/pdp.2008.57"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Airfoil design utilizing parallel processors

Stephen C. Brawley, Garth V. Hobson
<span title="">1996</span> <i title="American Institute of Aeronautics and Astronautics (AIAA)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/6icinac4gbdpzask6p4e3mbtc4" style="color: black;">Journal of Aircraft</a> </i> &nbsp;
Airfoil Design Utilizing Parallel Processors Stephen C. Brawley* and Garth V. Hobsont U.S.  ...  The parallel application required each of the 16 processors to calculate eight objective functions in parallel and was com- pleted in roughly 4 h.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.46994">doi:10.2514/3.46994</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/bflvjlqx2vc5jo7fbpbueq53cm">fatcat:bflvjlqx2vc5jo7fbpbueq53cm</a> </span>
<a target="_blank" rel="noopener" href="https://archive.org/details/sim_journal-of-aircraft_may-june-1996_33_3/page/630" title="read fulltext microfilm" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Archive [Microfilm] <div class="menu fulltext-thumbnail"> <img src="https://archive.org/serve/sim_journal-of-aircraft_may-june-1996_33_3/__ia_thumb.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2514/3.46994"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Watchdog processors in parallel systems

András Pataricza, István Majzik, Wolfgang Hohl, Joachim Hönig
<span title="">1993</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/t4iorsn7lnh2xkhqs5p35b5n54" style="color: black;">Microprocessing and Microprogramming</a> </i> &nbsp;
A watchdog processor (WDP) is a relatively simple coprocessor built for concurrent, information compaction based error detection in the main program control flow.A new algorithm called SEIS (Signature  ...  INTRODUCTION A massively parallel multiprocessor contains several thousands of processing nodes.  ...  Since the early eighties the most promising solution for checking the program execution flow in the main processor is the use of watchdog processors (WDP) [3] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/0165-6074(93)90059-t">doi:10.1016/0165-6074(93)90059-t</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/7gdwi26r3rcchf6juxlswgi6sy">fatcat:7gdwi26r3rcchf6juxlswgi6sy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922040435/http://static.inf.mit.bme.hu/pub/emicro93.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/35/c3/35c3510d9496e3fd23b8ddf8ef4d558d31b6d3ba.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/0165-6074(93)90059-t"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

Compilation for instruction parallel processors [chapter]

U. Kastens
<span title="">1991</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
As soon as processor design lifts control of internal parallelism to the  ...  Such fine grained parallelism can be analyzed by compilers, in order to take advantage of instruction level parMlelism in the processor.  ...  On the other hand a parallelizing compiler is absolutely necessary to achieve the potential performance of such a processor. Parallelism on the level of micro programs is a rather old technique.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-53669-8_72">doi:10.1007/3-540-53669-8_72</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/xqgxnu4hjnet3jruz7jjdawpky">fatcat:xqgxnu4hjnet3jruz7jjdawpky</a> </span>
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Speed Scaling on Parallel Processors

Susanne Albers, Fabian Müller, Swen Schmelzer
<span title="2012-08-09">2012</span> <i title="Springer Nature"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qhi3z76be5c5xeihac5cyiid3m" style="color: black;">Algorithmica</a> </i> &nbsp;
While previous work on energy-efficient algorithms has mostly focused on single processor environments, in this paper we investigate multi-processor settings.  ...  For the latter setting we also develop a polynomial time algorithm achieving a constant factor approximation guarantee that is independent of the number of processors.  ...  We are given n jobs that have to be processed on m identical variable speed processors working in parallel.  ... 
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The gop parallel image processor [chapter]

Goesta H. Granlund
<span title="">1981</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
A new type of image processor, GOP (General Operator Processor), has been developed.  ...  Processing of a 512x512 image with a 3x3 operator takes approximately 0,5 seconds in the processor.  ...  For that reason fast special purpose image processors have been developed [I-10] . Most of these processors are oriented towards use of logical operations on binary images.  ... 
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