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A New Partial Order Reduction Algorithm for Concurrent System Verification [chapter]

Ratan Nalumasu, Ganesh Gopalakrishnan
1997 Hardware Description Languages and their Applications  
This paper presents a new partial order reduction algorithm called Two phase that is implemented in a verification tool, PV (Protocol Verifier).  ...  This paper presents a new partial-order reduction algorithm called Two phase that, in most cases, outperforms all comparable algorithms, and is part of a new protocol verification tool called PV that finds  ...  BACKGROUND The tools SPIN (Holzmann 1991) and PO-PACKAGE (Godefroid 1995) as well as our PV verifier use Promela (Holzmann 1991) as input language.  ... 
doi:10.1007/978-0-387-35064-6_25 fatcat:777impqm7rdk5nqozz4jyqogtq

Retargetable Netlists Generation and Structural Synthesis Based on a Meta Hardware Description Language: Melasy+

Sho Nishida, Katsumi Wasaki
2012 2012 Ninth International Conference on Information Technology - New Generations  
We are developing a compiler system, Melasy+, which is at a level higher than those of various model checking and hardware description languages.  ...  Melasy+ describes a single code and allows model checking and operation tests on an actual machine via a code generator for each language.  ...  We have been developed a meta hardware description language Melasy+ [15] with a purpose to automatically carry out code generation for various existing languages, such as hardware description languages  ... 
doi:10.1109/itng.2012.63 dblp:conf/itng/NishidaW12 fatcat:datobn7b4bcbvmuyhev74uvm3y

Gropius - advanced reuse concepts in a new hardware description language

Dirk Eisenbiegler, Christian Blumenroehr
In this paper we present a new hardware description language named Gropius. Gropius ranges from the gate level to the system level and supports abstraction and design reuse in a systematic manner.  ...  Both the size of a hardware description language and the complexity of the semantics determine the costs for teaching it to new circuit designers.  ...  elements of a hardware description language stand for.  ... 
doi:10.5445/ir/365698 fatcat:km5f3mt6hbcedlj7ngggph3t34

The VHSIC Hardware Description Language - A Glimpse of the Future

1986 IEEE Design & Test of Computers  
This process requires analyzing existing languages to ensure that features which have already been found useful and necessary are not overlooked in the process of generating new hardware description language  ...  Other excellent hardware description languages in industry today cover various aspects of hardware design and description, but none matches VHDL's total capabilities.  ... 
doi:10.1109/mdt.1986.294897 fatcat:6kdq3cwa4bdqho7hjegbjmweoe

Hardware Description Languages: Voices from the Tower of Babel*

G.J. Lipovski
1977 Computer  
Acknowledgments I would like to express my appreciation of the support of members of the Conference on Digital Hardware Languages, and in particular of Gordon Bell, Yaohan Chu, Don Dietmeyer, Fred Hill  ...  Future high-level languages for programming supercomputers that consist of an aggregate of microcomputers may find new need to express parallelism, so that the highly parallel hardware description languages  ...  A description technique is needed to show either hardware or software or combined hardware-software designs. Indeed, a hardware description language is needed.  ... 
doi:10.1109/c-m.1977.217740 fatcat:qau3yq5snjexpivc62iaciwmjm

New Aspects in HDL's Performance Evaluation

B. Andelkovic, V. Litovski, V. Zerbe
2005 EUROCON 2005 - The International Conference on "Computer as a Tool"  
New aspects in Hardware Description Language's (HDL) performance evaluation such as objectorientation, system-level modeling, analog and mixed-signal modeling, software description and verification capabilities  ...  Features of mainstream HDLs and verification languages VHDL-AMS, Java, SystemC, AleC++, MLDesigner, OpenVera, the e language, PSL and SystemVerilog are compared in the context of these aspects.  ...  Also, SystemVerilog as a unified hardware description and verification language is explored.  ... 
doi:10.1109/eurcon.2005.1629974 fatcat:urttnk375ze5fj5aooznv5aam4

A Golden Age of Hardware Description Languages: Applying Programming Language Techniques to Improve Design Productivity

Lenny Truong, Pat Hanrahan, Michael Wagner
2019 Summit on Advances in Programming Languages  
Thus, the programming languages community stands on the critical path to this new golden age. This implies that we are also on the cusp of a golden age of hardware description languages.  ...  ACM Subject Classification HardwareHardware description languages and compilation  ...  Finally, the authors would like to thank the organizers of SNAPL for creating a venue for visionary papers on programming languages.  ... 
doi:10.4230/lipics.snapl.2019.7 dblp:conf/snapl/TruongH19 fatcat:nsehyqgmargfxed2ourqxk3hve

A Short Historical Survey of Functional Hardware Languages

Gang Chen
2012 ISRN Electronics  
Functional programming languages offer a high degree of abstractions and clean semantics, which are desirable for hardware descriptions.  ...  This short historical survey is about functional languages specifically created for hardware design and verification.  ...  The new language is called BS1. Singh [112] extends his combinator style FPGA circuit description to GPU programming description.  ... 
doi:10.5402/2012/271836 fatcat:n2iml6tnnzhzbcjyuslsmdpy64

Superlog, a unified design language for system-on-chip

Peter L. Flake, Simon J. Davidmann
2000 Proceedings of the 2000 conference on Asia South Pacific design automation - ASP-DAC '00  
Superlog takes features of existing languages for software development and hardware design, adds features for system specification and hardware verification, and blends them into a single, coherent language  ...  The design of systems consisting of custom software controlling custom digital hardware is easier if a single language can be used for system specification, software development, hardware design and hardware  ...  In spite of the attempts to adapt programming languages to hardware description, most hardware design is done using hardware description languages, which are dedicated to the purpose.  ... 
doi:10.1145/368434.368814 dblp:conf/aspdac/FlakeD00 fatcat:xjxknqkmovfc3apbim4btt3dce

Comments on "the buffer behavior in computer communication systems"

J. G. Shanthikumar
1981 IEEE transactions on computers  
Index Terms-Design automation, digital simulation, hardware, hardware compiler, hardware description, hardware language, language, register transfer language, wire list. 0018-9340/81 /0200-0157S00.75  ...  This correspondence describes the extension and formalization of the hardware description language AHPL to form AHPL III. This language provides for nesting AHPL descriptions within descriptions.  ...  INTRODUCTION Of the hardware description languages currently in use, most may be classified as register transfer languages [5]-[8].  ... 
doi:10.1109/tc.1981.6312182 fatcat:nhash6re2za4le7y6b4dxl37ma

A Framework for Architectural Description of Embedded System [chapter]

Daniela Cristina Cascini Peixoto, Diógenes Cecílio da Silva Júnior
2004 Lecture Notes in Computer Science  
This tool enables the description of an embedded system through a specific language.  ...  In this paper a new approach for describing embedded systems is presented. The approach is based on the composition of hardware and software components with the addition of an interface between them.  ...  Widely used languages to support the description at this level are VHDL (VHSIC Hardware Description Language) and Verilog HDL.  ... 
doi:10.1007/978-3-540-30113-4_2 fatcat:o5yiugryr5dgxbmbi4dzeykbju


Negin Mahani, Parnian Mokri, Mahshid Sedghi, Zainalabedin Navabi
2009 ACM SIGAda Ada Letters  
Recent research on system level design has produced a new level of abstraction for description of hardware that is referred to as Transaction Level Modeling, or TLM.  ...  Inherent concurrency of Ada, makes this language a good candidate for design and description of modern electronic systems.  ...  In this paper, we introduce SystemAda as a system description language for describing hardware systems.  ... 
doi:10.1145/1620593.1620595 fatcat:ncrpxbukkbg25me537yqylompu


Jean-Pierre Elloy, Françoise Simonot-Lion
2002 IFAC Proceedings Volumes  
This paper presents the AEE project (Embedded Electronic Architecture), a French cooperative research and development program whose purpose is to specify new solutions for in-vehicle embedded system development  ...  The Architecture Implementation Language (AIL_Transport) has been defined to specify and describe precisely any vehicle electronic architecture.  ...  Gasnier and Yvon Trinquet (IRCCyN), Xavier Hanin (PSA) and Evelyne Silva (PSA), Bernard Bavoux, Philippe Germanicus and Ziad El Khoury (Valeo) for their essential contributions to the definition of the AIL language  ... 
doi:10.3182/20020721-6-es-1901.00060 fatcat:4iypmsyg3jaile6uuaf5x5ybsq

A new Approach to Performance Evaluation of Formally Specified Protocols [chapter]

Stefan Böhmer, Ralf Klafka
1995 IFIP Advances in Information and Communication Technology  
Further, a new method is introduced to estimate the hardware performance requirements to run a given communication protocol properly.  ...  By means of an appropriate hardware emulation system that has been implemented, it becomes as well possible to compare different protocol implementations with regard to the efficiency of hardware utilization  ...  and Description Language D.  ... 
doi:10.1007/978-0-387-34878-0_37 fatcat:lutznlk5hjgdler6hiqtw2bryu

Panel Discussion: Is There a Crisis in Hardware Verification? [chapter]

Hon F. Li, David K. Probst
1997 IFIP Advances in Information and Communication Technology  
Rather, it is hard for us to say (i.e. specify) what we need to say in either language. The consensus is rapidly growing that industry needs a new hardware-description language.  ...  power in the description languages.  ... 
doi:10.1007/978-0-387-35190-2_20 fatcat:7ppg65wv3jda7k2bro6abawrjm
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