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Elaboration-time synthesis of high-level language constructs in SystemC-based microarchitectural simulators

Zhuo Ruan, Kurtis Cahill, David Penry
2010 2010 IEEE International Conference on Computer Design  
Structural modeling serves as an efficient method for creating detailed microarchitectural models of complex microprocessors. High-level language constructs such as templates and object polymorphism are used to achieve a high degree of code reuse, thereby reducing development time. However, these modeling frameworks are currently too slow to evaluate future design of multicore microprocessors. The synthesis of portions of these models into hardware to form hybrid simulators promises to improve
more » ... romises to improve their speed substantially. Unfortunately, the high-level language constructs used in structural simulation frameworks are not typically synthesizable. One factor which limits their synthesis is that it is very difficult to determine statically what exactly the code and data to synthesize are. We propose an elaboration-time synthesis method for SystemCbased microarchitectural simulators. As part of the runtime environment of our infrastructure, the synthesis tool extracts architectural information after elaboration, binds dynamic information to a low-level intermediate representation (IR), and synthesizes the IR to VHDL. We show that this approach permits the synthesis of high-level language constructs which could not be easily synthesized before.
doi:10.1109/iccd.2010.5647583 dblp:conf/iccd/RuanCP10 fatcat:dr63tde4ure2baxmrmesu63i4y