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A 62-dB SNDR second-order gated ring oscillator TDC with two-stage dynamic D-type flipflops as a quantization noise propagator

Keisuke Okuno, Toshihiro Konishi, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi
2012 10th IEEE International NEWCAS Conference  
This paper presents a second-order noise shaping time-to-digital converter (TDC) with two gated ring oscillators (GROs). The oscillating outputs from the GROs are counted and digitized. As a quantization noise propagator (QNP) between the two GROs, two-stage dynamic d-type flipflops (DDFFs) a NOR gate are adopted. The proposed QNP does not propagate a time error caused by flipflop's metastability to the next GRO, and thus improves its linearity over the conventional master-slave dtype flipflop.
more » ... ave dtype flipflop. In a standard 65-nm CMOS process, an SNDR of 62-dB is achievable at a sampling rate of 65MS/s.
doi:10.1109/newcas.2012.6329013 dblp:conf/newcas/OkunoKIYK12 fatcat:2w76mmcqxnctze5dyol3gfzrg4