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The design of a low energy FPGA

Varghese George, Hui Zhang, Jan Rabaey
1999 Proceedings of the 1999 international symposium on Low power electronics and design - ISLPED '99  
This work presents the design of an energy efficient FPGA architecture. Significant reduction in the energy consumption is achieved by tackling both circuit design and architecture optimization issues concurrently. A hybrid interconnect structure incorporating Nearest Neighbor Connections, Symmetric Mesh Architecture, and Hierarchical connectivity is used. The energy of the interconnect is also reduced by employing low-swing circuit techniques. These techniques have been employed to design and
more » ... oyed to design and fabricate an FPGA. Preliminary analysis show energy improvement of more than an order of magnitude when compared to existing commercial architectures.
doi:10.1145/313817.313920 dblp:conf/islped/GeorgeZR99 fatcat:noe7ydhzmnfhxhfepp42pidsie