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WATCHMAN device-related thrombus successfully treated with apixaban

Chun-Ka Wong, Pak-Hei Chan, Cheung-Chi Lam, On-Hing Kwok, Yat-Yin Lam, Chung-Wah Siu
2017 Medicine  
Rationale: Among atrial fibrillation patients with high risk of bleeding, left atrial appendage occlusion has emerged as an alternative to long-term oral anticoagulation therapy for stroke prevention. Device-related thrombus remains a major concern because it may result in recurrent embolic events. To date, there is no consensus on the optimal method of treating device-related-thrombus. Patient concerns: A 78-year-old man with atrial fibrillation had an episode of intracranial hemorrhage while
more » ... aking warfarin. He subsequently underwent percutaneous placement of a 30-mm Watchman device to the left atrial appendage. He was prescribed dual anti-platelet therapy with aspirin and clopidogrel. Diagnosis: Reassessment echocardiography 3 months later found device-related thrombus. Interventions: The antithrombotic regimen was switched from dual antiplatelet therapy to apixaban. Outcomes: Reassessment echocardiography 3 months later revealed complete resolution of the device-related thrombus. Apixaban was stopped. He had dual antiplatelet therapy for 6 more months followed by life-long aspirin. There was no bleeding complication since implantation of Watchman device. Lessons: We demonstrated successful treatment of device-related thrombus with a short course of apixaban with complete resolution of thrombus. Further randomized controlled trials are required to determine the choice and duration of drug therapy for device-related thrombus. Abbreviations: AF = Atrial fibrillation, INR = International normalized ratio, LAAO = Left atrial appendage occlusion.
doi:10.1097/md.0000000000008693 pmid:29381951 pmcid:PMC5708950 fatcat:2ivid7gagnffhjrlr7uobzv4pa

An energy-adaptive MPPT power management unit for micro-power vibration energy harvesting

Jun Yi, Feng Su, Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2008 2008 IEEE International Symposium on Circuits and Systems  
A batteryless power management unit (PMU) that manages harvested low-level vibration energy from a piezoelectric device for a wireless sensor node is presented. An energy-adaptive maximum power point tracking (EA-MPPT) scheme is proposed that allows the PMU to activate different operation modes according to the available power level. The harvested energy is processed by an ac-dc voltage doubler followed by on-chip charge pumps with variable up/down conversion ratios for higher efficiency.
more » ... eaving technique is employed for the high-power output to reduce both current and voltage ripples. The PMU is designed using a 0.35μm CMOS process, and simulation results are presented to demonstrate its functions.
doi:10.1109/iscas.2008.4541981 dblp:conf/iscas/YiSLKT08 fatcat:wbophudmvbbubckf5aaz6hycui

Integrated single-inductor dual-input dual-output boost converter for energy harvesting applications

Ngok-Man Sze, Feng Su, Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2008 2008 IEEE International Symposium on Circuits and Systems  
An integrated single-inductor dual-input dual-output (SI DIDO) boost converter for energy harvesting applications was designed in a 0.35μm CMOS process. It provides two regulated output voltages for the load and the charge storage device, and two sources, the energy harvesting source and the charge storage device, are multiplexed to serve as the input. The implementation has several special features. (1) The input power MUX is driven by an internal charge pump for a larger gate drive to save
more » ... a. (2) The power stage is implemented with an active diode core to eliminate gate drive circuitry. (3) A 1:7 timeslot scheduling with a fixed peak inductor current is adopted to deliver energy to the two outputs with a large difference in load currents. The proposed converter could operate at 1V with up to 85% efficiency at 200mW.
doi:10.1109/iscas.2008.4541893 dblp:conf/iscas/SzeSLKT08 fatcat:ehnjx3e7xbc6lljmjuvqrzoau4

Adaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback

Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
2006 Proceedings of the 2006 conference on Asia South Pacific design automation - ASP-DAC '06  
A capacitor-less low dropout regulator (LDR) with direct current feedback is proposed. A symmetrically-matched voltage mirror in sensing the load current is employed, and gives excellent line and load regulations. The dynamic biasing results in an LDR with pole-tracking that extends the bandwidth of the loop gain at high load currents. The LDR was fabricated in a 0.35µm CMOS process with an active area of 0.11mm 2 , and measurement results corroborated well with both analysis and simulation.
doi:10.1145/1118299.1118328 fatcat:7tdchcx7zrglfblezlakwpzlce

CMOS Bandgap References With Self-Biased Symmetrically Matched Current–Voltage Mirror and Extension of Sub-1-V Design

Yat-Hei Lam, Wing-Hung Ki
2010 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
This paper describes an all-CMOS temperature sensor intended for RFID applications that achieves both sub-1V operation and high accuracy (±0.4°C) over a wide temperature range (-40 to 125°C). It is also an ultra-low-power design: drawing 700nA from a 0.85V supply. This is achieved by the use of dynamic threshold MOSTs (DTMOSTs) as temperature-sensing devices, which are then read out by an inverter-based 2 nd -order zoom ADC. Circuit errors are mitigated by the use of dynamic error-correction
more » ... hniques, while DTMOST spread is reduced by a single room temperature (RT) trim. The latter feature constitutes a significant advance over previous all-CMOS designs [5, 6] , which require two-point trimming to approach the same level of accuracy. In most CMOS processes, a diode-connected DTMOST can be readily realized by connecting the gate, bulk and drain of a standard PMOST together (Fig. 12.7 .1). The resulting device approximates an ideal diode, with an extrapolated gate-source voltage V GS ~ 0.6V at 0K and a linear temperature coefficient of about -1mV/°C [2] . Connecting the gate to the bulk reduces the influence of gate-oxide thickness on the resulting dynamic threshold voltage, and thus the V GS spread of a DTMOST is significantly less than that of a normal PMOST [1, 2] . Diodeconnected DTMOSTs can thus be used to replace the BJTs of a conventional band-gap voltage reference [2] or temperature sensor [1]. However, since the magnitude of V GS (~ 0.3V at RT) is only about half that of a BJT's base-emitter voltage V BE (~ 0.6V at RT), the resulting circuit can be operated at supply voltages below 1V over a wide temperature range, e.g., from -40 to 125°C. The sensor's front-end is shown in Fig. 12 .7.1. A pair of DTMOSTs with a 1:2 area ratio that are biased by identical currents I=90nA (at RT). The same currents also power a so-called current-voltage mirror (CVM) [3] , which forces a proportional-to-absolute-temperature (PTAT) voltage ΔV GS across a resistor. As a result, the biasing currents will also have a well-defined PTAT dependency. To minimize the effect of DTMOST mismatch, which would otherwise impact the accuracy of ΔV GS , the 1:2 area ratio is established by incorporating three unit DTMOSTs into a dynamic element matching (DEM) scheme. Since the associated DEM switches carry bias current, Kelvin connections are used to accurately read out V GS and ΔV GS . Another source of error is the CVM's offset and 1/f noise, which add directly to ΔV GS and thus impact the accuracy of the bias currents, and hence of both V GS and ΔV GS . Such errors are mitigated by chopping the CVM (Fig. 12.7 .1). The sensor's block diagram is shown in Fig. 12 .7.2. It consists of the DTMOST front-end, a 2 nd -order incremental zoom ADC, a voltage doubler and some control logic. As in [4], the zoom ADC uses a power-efficient coarse/fine algorithm to convert the front-end's output voltages V GS and ΔV GS into a temperaturedependent ratio X = V GS /ΔV GS . In this design, X varies from 5 to 28 over the temperature range -40 to 125°C. An off-chip digital backend then computes a PTAT function of temperature μ= α/(α+X), where α is a gain factor, which can be trimmed to compensate for V GS spread. The sensor has two supply voltages: an analog supply AVDD, which powers the front-end and the ADC, and a digital supply DVDD, which powers the voltage doubler. The output of the doubler drives the logic that, in turn, drives the switches that sample V GS and ΔV GS , thus facilitating the use of sub-1V supply voltages. To minimize its residual offset, the entire ADC is chopped over two conversions. As shown in Fig. 12.7 .2, the zoom ADC digitizes the output of the DTMOST frontend in a two-step manner [4] . Each zoom ADC conversion begins with a coarse SAR conversion followed by a fine ΔΣ conversion to generate the ratio X = V GS /ΔV GS . The coarse conversion determines the integer part of X, or n, by using a 5b SAR algorithm to compare V GS with integer multiples of ΔV GS (Fig. 12.7.2) . The fractional part of X, or μ', is then determined by a 2 nd -order incremental ΔΣ-ADC, whose reference voltages are arranged to straddle V GS by setting them to n·ΔV GS and (n+2)·ΔV GS . The resulting 2ΔV GS input range provides redundancy, thus relaxing the requirements on the coarse conversion, and ensuring that the modulator is not overloaded. The heart of the zoom ADC is a feed-forward 2 nd -order SC ΔΣ-ADC (Fig. 12.7.3) . At its input is a capacitive-DAC (cap-DAC) with 30 unit elements (each 60fF), which can sample either V GS or k·ΔV GS , where k = 1..30. In contrast to [4] , both integrators are formed around pseudo-differential inverter-based amplifiers, thus fully exploiting the reduced integrator swing conferred by zooming. The first integrator draws 135nA while the, less critical, 2 nd integrator draws only 66nA. These current levels are defined with the help of a dynamic biasing technique that simultaneously auto-zeros each amplifier [4] . During the coarse conversion, the first integrator computes V GS -k·ΔV GS , while its output is connected directly to the comparator via the switch S bp . Off-chip logic then implements the SAR algorithm by applying trial values k to the chip and monitoring the comparator's output. During the fine conversion, the mismatch between the unit elements of the cap-DAC is mitigated by the use of DEM. In contrast to [4], the required DEM logic is implemented on-chip (Fig. 12.7.4) . It consists of a 30b circular shift-register (SR), with an effective length (defined by a periodic reset signal) of n+3 bits, where n is the result of the coarse conversion. Resetting the SR loads it with a single logic "1," which then circulates on every succeeding clock pulse. This bit (via the m i outputs) is used to select the capacitor that samples V GS , while the other bits define the n+2 capacitors that may be used to sample ΔV GS . Depending on the bitstream output (bs), either n or n+2 capacitors will be selected (via the t i outputs). The SR is reset during the coarse conversion, so that the same capacitors are always used for the SAR conversion. The DTMOST's DEM logic is implemented by a separate 3b SR. The prototype sensor is realized in a standard 0.16μm CMOS process (Fig. 12.7.7). It occupies 0.085mm 2 , and draws 700nA from a 0.85V supply. The front-end and ADC draw 560nA, while the voltage doubler and the rest of the on-chip digital circuitry draw 140nA. For flexibility, the SAR logic and the sinc 2 decimation filter are implemented off-chip. However, simulations show that implementing them on-chip would only incur an extra 10nW per conversion. With DVDD fixed at 0.9V, AVDD was varied from 0.85V to 1.2V. The corresponding supply sensitivity of the front-end and ADC was 0.45°C/V. A total of 16 devices in ceramic DIL packages were characterized over the temperature range from -40 to 125°C. As shown in Fig. 12 .7.5 (top), their batchcalibrated inaccuracy was ±1°C (3σ, 16 devices), with a residual curvature of only 0.03°C. After an alpha trim at 30°C, the inaccuracy improves to ±0.4°C (3σ), as shown in Fig. 12 .7.5 (bottom). Offset trimming, as in [1], is slightly worse, resulting in an inaccuracy of ±0.5°C (3σ). These results show that DTMOSTs, like BJTs, can be effectively trimmed at a single temperature. While running at a clock frequency of 25kHz, the sensor requires only 3.6nJ to achieve a kT/C-limited resolution of 63mK (rms) in a conversion time of 6ms. This corresponds to a resolution FoM of 14.1pJK 2 , which is in line with the state of the art [4] . The sensor's performance is summarized in Fig. 12 .7.6 and compared to that of other state-of-the-art low-voltage designs. It can be seen that, except for the BJT-based design [4] , this sensor is 2-to-3× more accurate than the rest, while also achieving the best energy efficiency.
doi:10.1109/tvlsi.2009.2016204 fatcat:a3c5db2adzbjdis6imakt2z7vy

Integrated direct output current control switching converter using symmetrically-matched self-biased current sensors

Yat-Hei Lam, Suet-Chui Koon, Wing-Hung Ki, Chi-Ying Tsui
2006 Proceedings of the 2006 conference on Asia South Pacific design automation - ASP-DAC '06  
A non-inverting flyback converter using an integrated symmetrically-matched self-biased current sensor was fabricated in a 0.35µm CMOS process. It operates in pseudo-continuous conduction mode and employs a direct output current control scheme to achieve excellent line transient response. The converter switches at 1MHz with an input of 1.2V to 2V to give an output of 1.5V and delivers 250mA.
doi:10.1145/1118299.1118327 fatcat:fqrcehpbabdk5fkbyxjwmfzf7y

A 0.5V 29pJ/cycle sensor node processor for intelligent sensing applications

Jun Zhou, Xin Liu, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh (+2 others)
2014 2014 International SoC Design Conference (ISOCC)  
This paper presents a sensor node processor (SNP) with optimized energy efficiency and performance for intelligent sensing through architecture-level optimization and ultra-low voltage operation with timing-error monitoring. Two typical intelligent sensing applications are demonstrated with the proposed processor, consuming 39 and 29pJ/cycle at 0.5V respectively. I.
doi:10.1109/isocc.2014.7087600 fatcat:x2asueiidvagnctp2shc62jc3y

Functional recovery priorities and community rehabilitation service preferences of spinal cord injury individuals and caregivers of Chinese ethnicity and cultural background

Chor Yin Lam, Paul Aarne Koljonen, Christopher Chun Hei Yip, Ivan Yuen Wang Su, Yong Hu, Yat Wa Wong, Kenneth Man Chee Cheung
2022 Frontiers in Neurology  
Lam et al. Lam et al. . . /fneur. /fneur. . .  ...  Lam et al. Lam et al. . . /fneur. /fneur. . . TABLE Opinions on community rehabilitation services.  ... 
doi:10.3389/fneur.2022.941256 pmid:35989936 pmcid:PMC9382587 fatcat:kvbmzpnocfhnllepe4z72mat3y

Neuron-Glial Antigen 2 (NG2)-based Glial Induction of Human BMSCs: A fast & safe glial progenitor cell-based therapy for congenital myelin disorders of the central nervous system [article]

Guy Lam, Graham Ka-Hon Shea, Kenneth Lap Kei Wu, Maximilian Tak-Sui Li, Chun Hei Kwok, Cheuk Yin Wong, Alex Yat Ping Tsui, Daisy Kwok Yan Shum, Ying Shing Chan
2019 bioRxiv   pre-print
Oligodendrocytes (OLs) are the only myelinating glia in the central nervous system (CNS). In congenital myelin disorders, OL dysfunction or death results in loss of myelin. This causes progressive and irreversible impairment to motor and cognitive functions, and is amongst the most disabling neurological disorder. Neonatal engraftment by glial progenitor cells (GPCs) allows the robust myelination of congenitally dysmyelinated brain, thereby preserving brain function and quality of life of
more » ... ts. However, endogenous sources of glial progenitors are hard to obtain without causing secondary injury, while use of exogenous sources such as embryonic stem cells and induced-pluripotent stem cells face considerable ethical and safety issues. To circumvent such hurdles, we asked whether NG2+ cells in the bone marrow could be a potential cell source for GPCs. We successfully generated glial progenitor cells (GPCs) from human bone marrow stromal cells (hBMSCs) from 3 donors using a 14-day induction protocol. The generated hBMSC-GPCs were highly enriched in OPC marker expression, including OLIG2, PDGFRα, NG2, SOX10 and O4, and showed efficient differentiation into myelinogenic oligodendrocytes when transplanted into postnatal day 7 (P7) myelin-deficient shiverer mice. Remyelination of the shiverer mouse brain significantly extended lifespan and improved motor function. The novel induction protocol described here provides a method for fast, simple and effective glial therapy for myelin disorders, overcoming existent hurdles of cell source restriction and time frame requirement.
doi:10.1101/658997 fatcat:fwa4732devh4lm2zr4rmmbdwq4

Adaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback

Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui
Asia and South Pacific Conference on Design Automation, 2006.  
A capacitor-less low dropout regulator (LDR) with direct current feedback is proposed. A symmetrically-matched voltage mirror in sensing the load current is employed, and gives excellent line and load regulations. The dynamic biasing results in an LDR with pole-tracking that extends the bandwidth of the loop gain at high load currents. The LDR was fabricated in a 0.35µm CMOS process with an active area of 0.11mm 2 , and measurement results corroborated well with both analysis and simulation.
doi:10.1109/aspdac.2006.1594658 dblp:conf/aspdac/LamKT06 fatcat:amqovkdqonbkbhzm6qhrpy2rvm

DAS INTERLUDIUM DE CLERICO ET PUELLA UND DAS FABLIAU VON DAME SIRIZ

W. HEUSER
1907 Anglia. Zeitschrift für englische Philologie  
Wel wor suilc a man to life Yat suilc a may mithe haue to wyfe.  ...  Yat es nouct for mys-gilt. Certhes, for yi luf ham hi spilt. A, suythe mayden, reu of me, Yat es ty luf hand ay sal be, ffor ye luf of y[e] mod[er] of eine, Yu mend yi mode and her my steuene!  ...  y sin lys; ffor cani me non oyir yink - Yat wot Cn'st, of he-tcene kync, lesu Cn'st, of hewene hey, 80 Gef yat hay may heng hey, And gef yat hy may se, Yat yay be heng 9 on a tre, Yat yis ley as  ... 
doi:10.1515/angl.1907.1907.30.306 fatcat:7es4jlm6w5gdxouamyihppt37q

LIEDERSAMMLUNGEN DES XVI. JAHRHUNDERTS, BESONDERS AUS DER ZEIT HEINRICHS VIII. III

EWALD FLÜGEL.
1903 Anglia. Zeitschrift für englische Philologie  
Vorsatzblättern und 253 folgenden blättern, blatt 3 und 4 enthält einen alten index (jetzt ist 4 falsch eingeheftet), blatt l notizen über The cheff places wher ffayrs bee kept in [England], blatt 2 über The grace yat  ...  [B] 1] As I came by a grene forest syde, I met with a forster yat badde me abyde. with hey go bet / hey go bet / hey go howe!  ...  With hey go let / hey go bet [hey go howe]! There he gothe / there he goth [hey go howe]! We shall haue sport and game ynowe!  ... 
doi:10.1515/angl.1903.1903.26.94 fatcat:hpcdgymw5zftzhbhyepmqoloxq

Livre Intitulé Laisa. Sur les Exceptions de la Langue Arabe par Ibn Khâloûya, dit Ibn Khâlawaihi: Texte Arabe Publié d'après le Manuscrit Unique du British Museum (Continued)

Hartwig Derenbourg
1899 The American Journal of Semitic Languages and Literatures  
dic Uebylt nyt) Hey ppt) Sle ull uate & atl Pssyey!! wate ais sds Korn pIT Sy! Lat LS) foal praindy HEI sO OSH here, GLI cry nly gill Le WOM yo srely Hd phe Ub IS Bey UI HB yy Spey ere Cor sre ol!  ...  le [>>] isl, nn | LS & Lams Gym isis Lhe Wi esl slo Goal ISR ew GL wt Ils tot KLIS pels, sie le WH uSL, tty 5s 53 ches SIG LSly Ys Gl ylle Ye ods sid ie SLs, SUBS, Slas agls GL cud, cud ed, Gu CHS Listy  ... 
doi:10.1086/369341 fatcat:nhy5w6bmkfgunftx3tua7lzzo4

The trouble with tongzhi

Andrew D. Wong
2008 Pragmatics: Quarterly Publication of the International Pragmatics Association  
lam hai gong faan hei ngo ji-gei I think I should talk about my own experience 2. ngo lam li sei-ng lin bin-fa I think the changes within the last four or five dou hou daai laak years have been rather  ...  Linda is different from other lesbians, in that she has more gay friends than lesbian friends. (6) Linda: gam ngo lam second level so I think the second level is maybe a a involve yat-di yat-di ge maybe  ... 
doi:10.1075/prag.18.2.05won fatcat:ndxbyqopurcrvaqhun4jooy4su

Novel identification of zyxin upregulations in the motile phenotype of hepatocellular carcinoma

Shirley M-H Sy, Paul B-S Lai, Etonia Pang, Navy L-Y Wong, Ka-Fai To, Philip J Johnson, Nathalie Wong
2006 Modern Pathology  
LAM Yat Yin and FUNG Wing Hong.  ...  <P067345> YU Cheuk Man; ZHANG QING; CHAN Yat Sun Joseph; CHAN Ck; YIP Wai Kwok Gabriel; CHAN Kit Wan Skiva; WU E B; LAM Yat Yin; LEE Pui Wai; CHAN Kin Yin and FUNG W. H..  ... 
doi:10.1038/modpathol.3800626 pmid:16680155 fatcat:bxxdh7z6rjagnamqljmneex22q
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