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Who guards the guards? formal validation of the Arm v8-m architecture specification

Alastair Reid
2017 Proceedings of the ACM on Programming Languages  
Despite the fact that the ARM v8-M specification had previously been extensively tested, we found twelve bugs (including two security bugs) that have all been fixed by ARM.  ...  We demonstrate our approach on ARM's v8-M Processor Specification, which is intended to improve the security of Internet of Things devices.  ...  We are grateful to John Regehr, Peter Sewell and Nathan Chong and to the anonymous referees for their comments and suggestions about the content and presentation of this paper.  ... 
doi:10.1145/3133912 dblp:journals/pacmpl/Reid17 fatcat:ig6b6ekj3rapjo7rkacvzgijru

Managing confidentiality leaks through private algorithms on Software Guard eXtensions (SGX) enclaves

Kubilay Ahmet Küçük, David Grawrock, Andrew Martin
2019 EURASIP Journal on Information Security  
This paper aims to address this problem, by exploring the components of the Trusted Computing Base (TCB) in hardware-supported enclaves.  ...  To some extent, these problems can be addressed by ensuring the use of secure hardware in the execution environment; however, an insecure software-stack can only provide limited algorithm secrecy.  ...  Availability of data and materials Data sharing is not applicable to this article as no datasets were generated or analysed during the current study.  ... 
doi:10.1186/s13635-019-0091-5 fatcat:53lwbanrpjhv7buzrrm73tcjr4

A high-level operational semantics for hardware weak memory models [article]

Robert J. Colvin, Graeme Smith
2018 arXiv   pre-print
In this paper we build on extensive work elucidating the semantics of assembler-level languages on hardware architectures with weak memory models (specifically TSO, ARM and POWER) and lift the principles  ...  We also use the tool as a prototype to model check implementations of data structures from the literature against their abstract specifications.  ...  The work was supported by Australian Research Council Discovery Grant DP160102457.  ... 
arXiv:1812.00996v1 fatcat:44yrzxpyffcmdnngkbs4gwdnay

Validation of Abstract Side-Channel Models for Computer Architectures [chapter]

Hamed Nemati, Pablo Buiras, Andreas Lindner, Roberto Guanciale, Swen Jacobs
2020 Lecture Notes in Computer Science  
We have evaluated our framework by validating models that abstract the data-cache side channel of a Raspberry Pi 3 board with a processor implementing the ARMv8-A architecture.  ...  Validation is done by checking indistinguishability of the two inputs on real hardware by executing the program and analyzing the side channel.  ...  Contingencies Agency, as well as the German Federal Ministry of Education and Research (BMBF) through funding for the CISPA-Stanford Center for Cybersecurity (FKZ: 13N1S0762).  ... 
doi:10.1007/978-3-030-53288-8_12 fatcat:a3lfammd4fb4tbf27uhgsl7m2q

Validation of Abstract Side-Channel Models for Computer Architectures [article]

Hamed Nemati and Pablo Buiras and Andreas Lindner and Roberto Guanciale and Swen Jacobs
2020 arXiv   pre-print
We have evaluated our framework by validating models that abstract the data-cache side channel of a Raspberry Pi 3 board with a processor implementing the ARMv8-A architecture.  ...  Validation is done by checking indistinguishability of the two inputs on real hardware by executing the program and analyzing the side channel.  ...  Contingencies Agency, as well as the German Federal Ministry of Education and Research (BMBF) through funding for the CISPA-Stanford Center for Cybersecurity (FKZ: 13N1S0762).  ... 
arXiv:2005.05254v1 fatcat:hdb6e7a4tfemjoxnxiikpzct7u

Overcoming an Untrusted Computing Base: Detecting and Removing Malicious Hardware Automatically

Matthew Hicks, Murph Finnicum, Samuel T. King, Milo M. K. Martin, Jonathan M. Smith
2010 2010 IEEE Symposium on Security and Privacy  
The computer systems security arms race between attackers and defenders has largely taken place in the domain of software systems, but as hardware complexity and design processes have evolved, novel and  ...  The exception handler software is responsible for providing forward progress by emulating the effect of the exceptiongenerating instruction in software, effectively providing a detour around suspicious  ...  Any opinions, findings and conclusions or recommendations expressed in this paper are solely those of the authors.  ... 
doi:10.1109/sp.2010.18 dblp:conf/sp/HicksFKMS10 fatcat:ugy6qqmkmrhlrmwmwgn3rsv6rm

Sancus 2.0

Job Noorman, Felix Freiling, Jo Van Bulck, Jan Tobias Mühlberg, Frank Piessens, Pieter Maene, Bart Preneel, Ingrid Verbauwhede, Johannes Götzfried, Tilo Müller
2017 ACM Transactions on Privacy and Security  
Over the past three years, signi cant experience has been gained with applications of Sancus, and several extensions of the architecture have been investigated -both by the original designers as well as  ...  e Sancus security architecture for networked embedded devices was proposed in 2013 at the USENIX Security conference.  ...  security architecture in the VM guards the interactions between them.  ... 
doi:10.1145/3079763 fatcat:xl5ws4asjjei7ot53o3yso4jpi

Architectural and Operating System Support for Virtual Memory

Abhishek Bhattacharjee, Daniel Lustig
2017 Synthesis Lectures on Computer Architecture  
We also thank Arka Basu, Tushar Krishna, and an anonymous reviewer for their helpful comments and suggestions to improve the quality of this book.  ...  A special thanks to Mike Morgan for his support of this book.  ...  However, the specifics can vary from architecture to architecture.  ... 
doi:10.2200/s00795ed1v01y201708cac042 fatcat:4re5afn53jhu7ezxwtb25ja3ca

The Esterel synchronous programming language: design, semantics, implementation

Gérard Berry, Georges Gonthier
1992 Science of Computer Programming  
We discuss the pros and cons of this compiling technique and the practical validity of the synchrony hypothesis.  ...  Boussinot who analyzed the causality problem, proposed alternative semantics, and wrote the ESTEREL v3 compiler kernel, R. Bernhard, A. Ressouche, J.-B. Saint, J.-M.  ...  The key idea is to keep the memory actions formal at compile time since they can only be performed at run-time.  ... 
doi:10.1016/0167-6423(92)90005-v fatcat:4vc4z4vqpngmdihjl7uuwiwube

ESMAC Abstracts 2004

2004 Gait & Posture  
Further study needs to quantify any specific economic benefits that this new technique may offer the health service.  ...  Stride analysis was used to detect early post-operative differences in walking ability between patients who received a hip replacement using the relatively new minimally invasive technique and the traditional  ...  Discussion Arm swing in normal walking reduces cadence and increases stride length, hence, contributes to gait efficiency.  ... 
doi:10.1016/j.gaitpost.2004.06.001 fatcat:ags3kpkwgbdnxo2xsot7zj6c6e

D7.3 - Interim Dissemination, Communication and Stakeholders' Activity Report

Suite5, SECURA BV
2020 Zenodo  
An interim report including all activities related to dissemination and communication of ASCLEPIOS, that were performed during the first reporting period, and a plan for the second period of the project  ...  by providing a formal description of the proposed scheme.  ...  of a patient who is under an emergency (e.g. acute stroke).  ... 
doi:10.5281/zenodo.4022429 fatcat:npla3eauvncfbpt3ooj5xvdtpe

Archeological Investigations for Fort Stabilization and Restoration, For McKavett State Historical Park, Menard County, Texas: 1978-1990 Seasons

1996 Index of Texas Archaeology Open Access Grey Literature from the Lone Star State  
Archeological investigations at the park between 1978 and 1990 focused on recovering architectural data and artifacts to support restoration, stabilization, and interpretation of the military occupations  ...  and suspected architectural features.  ...  a valid distinction for analysis (Amy Earls, personal communication 1995).  ... 
doi:10.21112/ita.1996.1.20 fatcat:pzw75awdlvdkfa37vje3bwjy2u

Thriving in a crowded and changing world: C++ 2006–2020

Bjarne Stroustrup
2020 Proceedings of the ACM on Programming Languages (PACMPL)  
Specific language-technical topics include the memory model, concurrency and parallelism, compile-time computation, move-semantics, exceptions, lambda expressions, and modules.  ...  The description is based on personal participation in the key events and design decisions, backed by the thousands of papers and hundreds of meeting minutes in the ISO C++ standards committee's archives  ...  In the 1990s, the committee considered formal specification but after consulting with world-class experts concluded that neither specification technology nor the committee members were up to a formal specification  ... 
doi:10.1145/3386320 fatcat:cewdzna33zafla4z3zcpbehmvi

A Review of Research on Lecturing

M. J. Dunkin
1983 Higher Education Research and Development  
Lonsdale); "Some Characteristics and Attitudes of Academics in Australian Universities and Colleges of Advanced Education" (John A. Bowden and John Anwyl); "A Review of Research on Lecturing" (M. J.  ...  The review article on distance education covers four books, while each of the other review articles covers one book. (SW)  ...  ACKNOWLEDGEMENTS The author wishes to thank Ms. J.R. Lublin for reading a draft of this article and for making suggestions as to its final form.  ... 
doi:10.1080/0729436830020105 fatcat:puy3a2pmardplniepsmutgkzly

High-performance memory safety - Optimizing the CHERI capability machine

Alexandre Jean-Michel Procopi Joannou, Apollo-University Of Cambridge Repository, Apollo-University Of Cambridge Repository, Simon William Moore
2018
The CHERI hardware implementation of this shadowspace uses a capability-validity-tag table in memory and caches it at the end of the cache hierarchy.  ...  This work presents optimizations for modern capability machines and specifically for the CHERI architecture, a 64-bit MIPS instruction set extension for security, supporting fine-grained memory protection  ...  M-Machine The 1994 M-Machine [14] implements guarded pointers, encoding a segment descriptor in the upper bits of every 64-bit pointer.  ... 
doi:10.17863/cam.21472 fatcat:nlrewtlgdbg4nnpwiycpj6kkcq
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