Filters








1,582 Hits in 5.1 sec

Well-abstracted transition systems: application to FIFO automata

Alain Finkel, S. Purushothaman Iyer, Grégoire Sutre
2003 Information and Computation  
We propose the use of abstractions as a general framework to design accelerations. We investigate SemiLinear Regular Expressions (SLREs) as symbolic representations for FIFO automata.  ...  of a loop for FIFO automata with one channel.  ...  We are also grateful to the anonymous referee for many relevant comments.  ... 
doi:10.1016/s0890-5401(02)00027-5 fatcat:jdkiefwb4zd3xohy6y7jbgl7rq

Verification of Infinite-State Systems by Combining Abstraction and Reachability Analysis [chapter]

Parosh Aziz Abdulla, Aurore Annichini, Saddek Bensalem, Ahmed Bouajjani, Peter Habermehl, Yassine Lakhnech
1999 Lecture Notes in Computer Science  
We consider in particular systems modeled by means of extended automata communicating through unbounded fifo channels.  ...  Reachability analysis procedures allow to verify automatically properties at the abstract level as well as to generate auxiliary invariants and accurate abstraction functions that can be used at the concrete  ...  We have illustrated the application of this methodology on the case of extended fifo-channels systems.  ... 
doi:10.1007/3-540-48683-6_15 fatcat:7i7pjhprhnaf5bkiqyyzcvmw34

Asynchronously Communicating Visibly Pushdown Systems [chapter]

Domagoj Babić, Zvonimir Rakamarić
2013 Lecture Notes in Computer Science  
Our model also generalizes the well-known communicating finite-state machines with recognizable channel property allowing (1) individual components to be visibly pushdown automata, which are more suitable  ...  Our model consists of visibly pushdown automata communicating over unbounded reliable point-to-point firstin-first-out queues.  ...  Acknowledgment We would like to thank Brad Bingham, Jesse Bingham, Matko Botinčan, Steven McCamant, Jan Pachl, Shaz Qadeer, and Serdar Tasiran for their feedback on the early drafts of this document.  ... 
doi:10.1007/978-3-642-38592-6_16 fatcat:7dyumv5k6fhbtbbwkawlbpx5ci

Formal system-level design space exploration

Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet
2010 2010 10th Annual International Conference on New Technologies of Distributed Systems (NOTERE)  
A smart card system serves as case study to exemplify formal verification capabilities of DIPLODOCUS.  ...  This specification is in turn amenable to model-checking techniques to evaluate properties of the system, e.g., safety, schedulability, and performance properties.  ...  Acknowledgment The authors would like to thank Chafic Jaber, who kindly granted us the permission to experiment with his Smart Card Model.  ... 
doi:10.1109/notere.2010.5536852 dblp:conf/notere/KnorreckAP10 fatcat:dkloycur5babdmsl5ljcvfrxsq

System-level performance/power analysis for platform-based design of multimedia applications

Nicholas H. Zamora, Xiaoping Hu, Radu Marculescu
2007 ACM Transactions on Design Automation of Electronic Systems  
The objective of this article is to introduce the use of Stochastic Automata Networks (SANs) as an effective formalism for application-architecture modeling in system-level average-case analysis for platform-based  ...  System-level performance/power analysis for platform-based design of multimedia applications.  ...  Code for the PiP application was kindly provided by the Metropolis team.  ... 
doi:10.1145/1188275.1188277 fatcat:gtcjpiubjbdbjop3bvxnduyrx4

System-level performance/power analysis for platform-based design of multimedia applications

Nicholas H. Zamora, Xiaoping Hu, Radu Marculescu
2007 ACM Transactions on Design Automation of Electronic Systems  
The objective of this article is to introduce the use of Stochastic Automata Networks (SANs) as an effective formalism for application-architecture modeling in system-level average-case analysis for platform-based  ...  System-level performance/power analysis for platform-based design of multimedia applications.  ...  Code for the PiP application was kindly provided by the Metropolis team.  ... 
doi:10.1145/1217088.1217090 fatcat:uqa3sz5wk5b25jl3l5ozi2csia

Languages, Rewriting Systems, and Verification of Infinite-State Systems [chapter]

Ahmed Bouajjani
2001 Lecture Notes in Computer Science  
to iterating an arbitrary number of times the application of a transition relation i , for i 2 f1; : : : ; ng.  ...  Automata with unbounded sequential data structures: The very common models of pushdown systems and FIFO-channel systems can be straightforwardly represented in our framework.  ... 
doi:10.1007/3-540-48224-5_3 fatcat:ncoisj7wtbgabpjwswi2a4zef4

Extrapolation-Based Path Invariants for Abstraction Refinement of Fifo Systems [chapter]

Alexander Heußner, Tristan Le Gall, Grégoire Sutre
2009 Lecture Notes in Computer Science  
This paper investigates Cegar in the context of formal models of network protocols, in our case, the verification of fifo systems.  ...  Automatic abstraction refinement is also desirable for the safety verification of complex infinite-state models.  ...  Safety Verification of Labeled Transition Systems. We will use labeled transition systems to formally define the behavioral semantics of fifo systems.  ... 
doi:10.1007/978-3-642-02652-2_11 fatcat:xaaszrg3dzceje5geg5zmvsg54

Rigorous system level modeling and analysis of mixed HW/SW systems

P. Bourgos, A. Basu, M. Bozga, S. Bensalem, J. Sifakis, K. Huang
2011 Ninth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMPCODE2011)  
We propose a rigorous method and a tool chain that allows to obtain a faithful model representing the behavior of a mixed hardware/software system from a model of its application software and a model of  ...  It is illustrated through the construction of system models of MJPEG and MPEG2 decoder applications running on MPARM, a multicore architecture.  ...  Formally, the BIP system model conforms to the following abstract grammar: In order to deploy the application software on the architecture, we need a low level implementation model for the SW-Channels  ... 
doi:10.1109/memcod.2011.5970506 dblp:conf/memocode/BourgosBBBSH11 fatcat:ehj6b4qbf5hsnals6d3ciilaya

Verification of Infinite State Systems [chapter]

Ahmed Bouajjani
2003 Lecture Notes in Computer Science  
Both process algebras (or term rewriting systems) and automata (or finite control machines) are being used as specification formalisms.  ...  Such problems rise naturally as soon as we consider aspects like: • real-time constraints: timed and hybrid systems, • unbounded discrete data structures: counters, fifo-channels, stacks, etc. • parametric  ...  Concrete questions to be addressed are: • Which results in logic, automata theory, rewriting systems, etc. are applicable to automatic verification?  ... 
doi:10.1007/978-3-540-45220-1_7 fatcat:4j5lzdbfc5hd7ptdo4tpwvmd2m

Embedded and Real-time Systems [chapter]

Edward L. Lamie
2009 Real-Time Embedded Multithreading Using ThreadX  
Verification models and techniques applied to testing and control of reactive systems RESEARCH CENTER Rennes -Bretagne-Atlantique THEME Embedded and Real Time Systems Project-Team VERTECS  ...  Symbolic Supervisory Control of Infinite Transition Systems under Partial Observation using Abstract Interpretation 12 6.3.3. Playing optimally on timed automata with random delays 12 7. 7.1.  ...  Our research has been applied to telecommunication systems, embedded systems, smart-cards application, and control-command systems.  ... 
doi:10.1016/b978-1-85617-601-9.00001-2 fatcat:oo46lkp3gnbhbjc463pu7fs2hi

Embedded and Real-time Systems [chapter]

Edward L. Lamie
2009 Real-Time Embedded Multithreading Using ThreadX and MIPS  
Verification models and techniques applied to testing and control of reactive systems RESEARCH CENTER Rennes -Bretagne-Atlantique THEME Embedded and Real Time Systems Project-Team VERTECS  ...  Symbolic Supervisory Control of Infinite Transition Systems under Partial Observation using Abstract Interpretation 12 6.3.3. Playing optimally on timed automata with random delays 12 7. 7.1.  ...  Our research has been applied to telecommunication systems, embedded systems, smart-cards application, and control-command systems.  ... 
doi:10.1016/b978-1-85617-631-6.00001-9 fatcat:sq7s43icwvgk7lro4lpmj46g4a

Model-Driven Validation of SystemC Designs

Hiren D Patel, Sandeep K Shukla
2008 EURASIP Journal on Embedded Systems  
Our formal modeling is done entirely within the Microsoft SpecExplorer tool to formally describe the specification of the system under validation in the formal notation of AsmL.  ...  Functional test generation for dynamic validation of current system level designs is a challenging task.  ...  Furthermore, there may be multiple paths (different input sequences) that transition the system to the same state.  ... 
doi:10.1155/2008/519474 fatcat:wfnsushh5renljbrycg7skwwwe

Analysis of Real Time Operating System Based Applications [chapter]

Libor Waszniowski, Zdenek Hanzalek
2004 Lecture Notes in Computer Science  
This text is dedicated to modelling of real-time applications running under multitasking operating system. Theoretical background is based on timed automata by Alur and Dill.  ...  Such systems, used in practical real-time applications, can be modelled by timed automata and further verified since their reachability problem and model checking of TCTL problem is decidable.  ...  Introduction The aim of this article is to show, how timed automata [1] can be applied to modelling of real time software applications running under operating system with cooperative scheduling.  ... 
doi:10.1007/978-3-540-40903-8_18 fatcat:lym5spo5inbqhfbzpge7l6ayba

IF-2.0: A Validation Environment for Component-Based Real-Time Systems [chapter]

Marius Bozga, Susanne Graf, Laurent Mounier
2002 Lecture Notes in Computer Science  
In particular they may prevent its applicability to a wider context: the static nature of the intermediate representation prevents the analysis of dynamic systems.  ...  The semantics of time is similar to the one of timed automata: time progresses in states (i.e, all running processes wait in some state before selecting and executing some transition) and transitions take  ... 
doi:10.1007/3-540-45657-0_26 fatcat:l7wh523icja6hgfavppspjpkae
« Previous Showing results 1 — 15 out of 1,582 results