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Verification of gap-order constraint abstractions of counter systems

Laura Bozzelli, Sophie Pinchinat
2014 Theoretical Computer Science  
We investigate verification problems for gap-order constraint systems (GCS), an (infinitely-branching) abstract model of counter machines, in which constraints (over Z) between the variables of the source  ...  state and the target state of a transition are gap-order constraints (GC) [27] .  ...  We investigate verification problems for an (infinitely-branching) abstract model of counter machines, we call gap-order constraint systems (GCS), in which constraints (over Z) between the variables of  ... 
doi:10.1016/j.tcs.2013.12.002 fatcat:dgb36zt3xvdtdokegedzrfnhfm

Strong Termination for Gap-Order Constraint Abstractions of Counter Systems [chapter]

Laura Bozzelli
2012 Lecture Notes in Computer Science  
We address termination analysis for the class of gap-order constraint systems (GCS), an (infinitely-branching) abstract model of counter machines recently introduced in [8], in which constraints (over  ...  Z) between the variables of the source state and the target state of a transition are gap-order constraints (GC) [18].  ...  Recently, an (infinitely-branching) abstract model of counter systems, namely gap-order constraint systems (GCS), has been introduced [8], where the constraints (over Z) between the variables of the source  ... 
doi:10.1007/978-3-642-28332-1_14 fatcat:omdjexj7yvftbetnj3xl3cd2l4

Source code verification of a secure payment applet

Bart Jacobs, Martijn Oostdijk, Martijn Warnier
2004 The Journal of Logic and Algebraic Programming  
This paper discusses a case study in formal verification and development of secure smart card applications.  ...  A systematic approach is used to guarantee a secure flow of control within the applet: appropriate transition properties are first formalized as a finite state machine, then incorporated in the specification  ...  Acknowledgments We thank Joachim van den Berg for his help with the proofs, especially in the construction of the dedicated PVS strategies.  ... 
doi:10.1016/j.jlap.2003.07.007 fatcat:65pnzolwzbh5dawbfhdrporznu

Compositional Specification and Verification of High-Speed Transfer Protocols [chapter]

P. Herrmann, H. Krumm
1995 IFIP Advances in Information and Communication Technology  
Lamport's Temporal Logic of Actions (TLA). It is based on a modular compositional TLAstyle and supports the analysis of flexibly configured high-speed transfer protocols.  ...  Transfer protocols are composed from basic protocol mechanisms and accordingly a complex protocol can be verified by a series of relatively simple mechanism proofs. Our approach applies L.  ...  We represent abstract service properties (e.g., No Gaps) by a composition of more basic service constraints so that these service constraints correspond one-to-one with single basic protocol mechanisms  ... 
doi:10.1007/978-0-387-34867-4_23 fatcat:n7v65ejbl5gqfkgdgbel5whht4

Automatic Verification of Real-Time Systems with Rich Data: An Overview [chapter]

Ernst-Rüdiger Olderog
2012 Lecture Notes in Computer Science  
We present an overview of the results of the project "Beyond Timed Automata" of the Collaborative Research Center AVACS (Automatic Verification and Analysis of Complex Systems) during the period 2008-2011  ...  , which advances the automatic verification of high-level specifications of systems exhibiting the three dimensions of process behavior, complex infinite data, and continuous real-time-beyond the capabilities  ...  This paper is a report of the work done in the project  ... 
doi:10.1007/978-3-642-29952-0_14 fatcat:tplffbonpngj7hsyxyhan5rm6m

Periodicity based decidable classes in a first order timed logic

D. Beauquier, A. Slissenko
2006 Annals of Pure and Applied Logic  
This class covers a wide range of properties arising in the verification of real-time distributed systems with metric time constraints.  ...  Such counter-models facilitate the detection of errors in the specifications. Earlier we described decidable classes of verification problems based on a small model property.  ...  Acknowledgement We are very grateful to the anonymous referee whose constructive remarks led to a complete revision of the first version of the paper.  ... 
doi:10.1016/j.apal.2005.03.003 fatcat:bz5uiqmzjjbuzoxva3qh3e2t5i

Recursive Abstractions for Parameterized Systems [chapter]

Joxan Jaffar, Andrew E. Santosa
2009 Lecture Notes in Computer Science  
We then present an abstract interpretation framework which translates a paramerized system as a symbolic transition system which propagates such formulas as abstractions of underlying concrete states.  ...  We consider a language of recursively defined formulas about arrays of variables, suitable for specifying safety properties of parameterized systems.  ...  Key ideas include the handling of existentially and universally-quantified transition guards), and the use of gap-order constraints. Abstraction is done by weakening the gap-order constraints.  ... 
doi:10.1007/978-3-642-05089-3_6 fatcat:cxg7tbscrbhfnczsrqrlekhata

Guest Editorial: Special Issue on Model Checking in Requirements Engineering

Steve Easterbrook, Marsha Chechik
2002 Requirements Engineering  
In requirements engineering, the state machine typically represents an abstract description of the behaviour of some portion of the system to be specified, or its environment.  ...  With its emphasis on partial verification using fully automated techniques, model checking has led to an interest in 'lightweight' formal techniques [4] that can be applied at different levels of abstraction  ...  This 222 technique can handle systems with non-linear constraints, and abstractions generated with this technique preserve ACTL* properties of the original system.  ... 
doi:10.1007/s007660200017 fatcat:q2mffp33ing4ng3fht6cit5h2q

Survey on Parameterized Verification with Threshold Automata and the Byzantine Model Checker [article]

Igor Konnov and Marijana Lazić and Ilina Stoilkovska and Josef Widder
2022 arXiv   pre-print
ByMC implements several techniques for automatic verification of threshold-guarded distributed algorithms.  ...  Nowadays, they are implemented in distributed systems that involve hundreds or thousands of processes.  ...  This survey is based on the results of a long-lasting research agenda [JKS + 13a, KLVW17a, KLVW17b, LKWB17, BKLW19, SKWZ19, SKWZ21b].  ... 
arXiv:2011.14789v2 fatcat:zgx6tsgdnbehriqw2dor2dlbj4

Context-aware counter abstraction

Gérard Basler, Michele Mazzucchi, Thomas Wahl, Daniel Kroening
2010 Formal methods in system design  
The ensuant regularity in the induced system model can be exploited to reduce the verification complexity. One technique towards this goal is counter abstraction.  ...  Emerson and Trefler proposed counter abstraction as a way of achieving symmetry reduction for fixed-size systems [17] .  ...  Acknowledgements The authors are grateful to Alastair Donaldson for his rigorous review of this paper.  ... 
doi:10.1007/s10703-010-0096-7 fatcat:qqj5bnh7xff5lj6iqexy37padi

Verifying the Incorrectness of Programs and Automata [chapter]

Scot Anderson, Peter Revesz
2005 Lecture Notes in Computer Science  
Verification of the incorrectness of programs and automata needs to be taken as seriously as the verification of correctness.  ...  The precision of our lower bound approximation is controlled by a single parameter that can be adjusted by the user of the MLPQ system in which the approximation method is implemented.  ...  A gap-order is a constraint of the form x − y ≥ c or ±x ≥ c where x and y are variables and c is a non-negative integer constant.  ... 
doi:10.1007/11527862_1 fatcat:iryv46oarbd3nismgs27dfsgru

Aligning SysML with the B method to provide V&V for systems engineering

Erwan Bousse, David Mentré, Benoît Combemale, Benoît Baudry, Takaya Katsuragi
2012 Proceedings of the Workshop on Model-Driven Engineering, Verification and Validation - MoDeVVa '12  
Systems engineering, and especially the modeling of safety critical systems, needs proper means for early Validation and Verification (V&V) to detect critical issues as soon as possible.  ...  The objective of our work is to identify a verifiable subset of SysML that is usable by system engineers, while still amenable to automatic transformation towards formal verification tools.  ...  We had to define a SysML profile in order to fill a gap with some B concepts. The third step relies on found similarities to define a transformation with a semantic gap as little as possible.  ... 
doi:10.1145/2427376.2427379 fatcat:nkhiguqngfdtlpxhj27dhyyjb4

Formal verification of hybrid systems

Rajeev Alur
2011 Proceedings of the ninth ACM international conference on Embedded software - EMSOFT '11  
In this article, we briefly review selected existing approaches to formal verification of hybrid systems, along with directions for future research.  ...  In formal verification, a designer first constructs a model, with mathematically precise semantics, of the system under design, and performs extensive analysis with respect to correctness requirements.  ...  are linear constraints over first-order derivatives.  ... 
doi:10.1145/2038642.2038685 dblp:conf/emsoft/Alur11 fatcat:wtxbmn6karefzhpzsuhugqnzsq

Formal development process of safety-critical embedded human machine interface systems

Ning Ge, Arnaud Dieumegard, Eric Jenn, Bruno daAusbourg, Yamine Ait-Ameur
2017 2017 International Symposium on Theoretical Aspects of Software Engineering (TASE)  
This formal development process is illustrated on a simple use casepart of the display component of an alert management system used in a three-wheeled robot.  ...  It is aimed at blurring the boundaries between modeling, design, verification and implementation for the development of HMI.  ...  The authors would like to thank the members of the project for their cooperation.  ... 
doi:10.1109/tase.2017.8285636 dblp:conf/tase/GeDJdA17 fatcat:53m327zpgvdxngfefr4f32jlg4

Formal Verification Integration Approach for DSML [chapter]

Faiez Zalila, Xavier Crégut, Marc Pantel
2013 Lecture Notes in Computer Science  
More precisely, we propose a language to formally express system requirements and interpret verification results so that system designers (DSML end-users) avoid the burden of learning some formal verification  ...  The application of formal methods (especially, model checking and static analysis techniques) for the verification of safety critical embedded systems has produced very good results and raised the interest  ...  In order to tackle property-based verification problem, authors of [20] present the Metropolis design framework for embedded systems.  ... 
doi:10.1007/978-3-642-41533-3_21 fatcat:vy54v5aor5buzdwscum24qfqeq
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