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Study on Fault Detection and PCB Picture-Location Method of Logic Circuit

Mingping Xia
2013 Research Journal of Applied Sciences Engineering and Technology  
In this study, LASAR is used to carry out the logic circuit simulation so as to create such documents as fault dictionary, node truth value table, etc. for the preparation of fault detection.  ...  Due to the limitation of circuit observability and testing vectors, the diagnosis program can not accurately locate the fault just once in the process of diagnosis because the circuit is complex and users  ...  The fault dictionary method is used in the tested logic-digital circuit SPF (Fig. 1 ) of missile control and launch system .During the test, excitations are applied to the input ports of the circuit through  ... 
doi:10.19026/rjaset.5.4272 fatcat:65l57q7w45bwfkukbcgtszy2wa

1983 Index IEEE Transactions on Computers Vol. C-32

1983 IEEE transactions on computers  
Digital system fault diagnosis; Sequential logic circuit fault diagnosis Logic circuit fault tolerance fault-masking logic circuits; algebraic model.  ...  Lozano-Digital system fault diagnosis; cf. Computer fault diagnosis; Logic circuit fault diagnosis Digital system fault tolerance; cf.  ... 
doi:10.1109/tc.1983.1676190 fatcat:xsogjoynp5dt7mqu6dy4tiodfq

Fault Testing and Diagnosis of Sram based FBGA using Built-In-Self-Test-Architecture

Nagma. P, Ramachandran. S, Sathishkumar. E
2018 International Journal of Trend in Scientific Research and Development  
Built in Self-Test (BIST) is a design technique that allows a circuit to test itself .The proposed method of a built-in self-test (BIST) design for fault detection and fault diagnosis of static-RAM (SRAM  ...  The target fault detection/diagnosis of the proposed BIST structure are open/short and delay faults in the wire channels, stuck on/off faults in PSs, andstuck-at-0/1 faults in LUTs.  ...  For logic block diagnosis ,a BISD approach is presented in which multiple faults can be uniquely identified in only one test configuration.This method can be used for defect tolerance by the manufacturer  ... 
doi:10.31142/ijtsrd9415 fatcat:wtdhleviqjaj5if7pgdynwcire

The Dynamic Pattern Test Method for ASIC's Fault Detection

Seung-Beom Hong, Woo-Jae Shim, DoHyun Kim
2016 International Journal of Control and Automation  
The ASIC for control of the digital signal is progressing in the development of the avionics of the aircraft. In addition, the proportion used the ASIC in the industries is increasing continuously.  ...  In this paper, we proposed the Dynamic Pattern test method which created the TRD based on analyzed logic data extracted from ASIC and diagnosed on the ASIC circuits at the point of level of gate.  ...  As the approach method for the failure diagnosis on the circuit which is not provided with the TRD using Dynamic Pattern Test technique [6-7], the logic simulation using the internal logic extraction of  ... 
doi:10.14257/ijca.2016.9.12.22 fatcat:4pfef7w3inh37ksucqmz4vwqoe

Design of fault-tolerant computers

Algirdas Avižienis
1967 Proceedings of the November 14-16, 1967, fall joint computer conference on - AFIPS '67 (Fall)  
Causes and symptoms of logic faults in digital systems.  ...  Fault detection in digital circuits is implemented either by periodic or by concurrent diagnosis.  ...  Improper functioning of the logic circuits in a digital system is manifested by logic faults, which are defined for this paper as "permanent or transient deviations of logic variables from the values specified  ... 
doi:10.1145/1465611.1465708 dblp:conf/afips/Avizienis67 fatcat:wtu2n5wp2vdxpe2acea6rbj4zi

Learning Digital Test and Diagnostics via Internet

Heinz-Dietrich Wuttke, Sergej Devadze, Elmet Orasson, Margus Kruus, Artur Jutman, Raimund Ubar
2007 International Journal of Online Engineering (iJOE)  
The environment consists of a set of Java applets, and of web based access to the hardware equipments, which can be used in the classroom, for learning at home, in laboratory research and training, or  ...  , how to build self-testing systems, how to generate test patterns, how to analyze the quality of tests, and how to localize faults in hardware.  ...  In the diagnosis mode, an unknown fault should be first introduced into the circuit.  ... 
doaj:697180db74b3487b9c27c34c8b306bab fatcat:p4jbj327ezblldl2umulub6dou

Application of advanced fault diagnosis technology in electric locomotives

Lixin Lin, Xinhua Jiang, Zhiwu Huang, osheng Hu
2010 International journal of Modeling, identification and control  
In this paper, an advanced fault diagnosis system, which consists of logical control units, microcontrollers, colour display screens and an industry PC, is developed for SS7E locomotives in China.  ...  As the continuous development of intelligent mechatronic systems and robots, the fault diagnosis technology is making full advances in many practical applications.  ...  The computer unit collects the logic signal and changes it to be digital signal by fuzzy recognition. All the check data is sent to the computer unit for fault diagnosis.  ... 
doi:10.1504/ijmic.2010.034581 fatcat:n6tkztqi7jhgxgv4irpfphxkem

Design principles for processor maintainability in real-time systems

H. Y. Chang, J. M. Scanlon
1969 Proceedings of the November 18-20, 1969, fall joint computer conference on - AFIPS '69 (Fall)  
Several principles for designing logic circuits and fault detection and diagnostic tests are described in the fourth section.  ...  For combinational logic, programs for deriving sensitized paths are fairly simple to implement. The running speed is also moderate for circuits with very few reconvergent fanouts.  ... 
doi:10.1145/1478559.1478596 dblp:conf/afips/ChangS69 fatcat:3tj7ycd5kvhfdeceakb5mmnsz4

On the Design of Intelligent Virtual Instrument for Fault Diagnosis in Mixed Signal Analog Circuit

Ashwani Kumar, A. P. Singh
2013 International Journal of Computer Applications  
A benchmark R2R digital to analog converter mixed signal circuit is used for fault diagnosis in the study.  ...  The optimum numbers of test patterns required for fault diagnosis are decided by sensitivity analysis. Finally the fuzzy logic is used for the classification of the faults.  ...  Test patterns are selected for the diagnosis process using sensitivity analysis. Fault classification is carried out using fuzzy logic.  ... 
doi:10.5120/12822-9875 fatcat:gqel2ldmgvhipnoo3xinraltg4

Faulty-Tolerant Computing: An Overview

A. Avizienis
1971 Computer  
Also included are diagnostic programs that are executed (periodically or upon request) to test all logic circuits of the computer for the presence of permanent faults.  ...  The two most used variants of masking are component quadding for individual electronic components (Fig. 1) and triple modular redundancy (TMR) with voting ( Fig. 2) for logic circuits or larger parts  ... 
doi:10.1109/c-m.1971.216738 fatcat:pkfv2yzxw5apjoi3fnuxjfdv6u

A New Approach with Three Dimension Figure and ANSI/IEEE C57.104 Standard Rule Diagnoses Transformer's Insulating Oil

Ming-Jong Lin
2014 Engineering  
to design a heuristic power transformer fault diagnosis tool in practice.  ...  The dissolved gas analysis (DGA) is an effective method for detecting incipient faults in immersed oil power transformers.  ...  Combinations of logic gates form circuits designed with specific tasks in mind [7] . This paper of blocks of digital circuits is shown (in Figure 2) .  ... 
doi:10.4236/eng.2014.612078 fatcat:aslm3xlj2reajn7vplsgn27zuq

Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systems

Raimund Ubar
2011 Facta universitatis - series Electronics and Energetics  
The idea of SSBDDs is to establish one-to-one mapping between the nodes of SSBDDs and signal paths in the related digital circuit.  ...  Such a mapping allowed to investigate and solve with SSBDDs a lot of test and diagnosis related problems of digital circuits, which are associated explicitly with the structure.  ...  SSBDDs have been used for optimization of fault location processes in digital circuits [49, 50] , for design error diagnosis [51] , for testability evaluation of circuits [52] , and for optimization  ... 
doi:10.2298/fuee1103303u fatcat:2n2rftzxifcw3kx5tyyuc62e4e

Page 5314 of Mathematical Reviews Vol. , Issue 81M [page]

1981 Mathematical Reviews  
Vergniault, Physical versus logical fault models in MOS-LSI circuits. Impact on their testability (pp. 195-202); Satish M.  ...  Self-checking circuits: Shean Lin Wang and Al. girdas Avizienis, The design of totally self-checking circuits using programmable logic arrays (pp. 173-180); Daniel Etiemble, Mul- tivalued I7L circuits  ... 

Page 3926 of Mathematical Reviews Vol. 58, Issue 5 [page]

1979 Mathematical Reviews  
I. 58 #26568 Application of fault folding in test generation for logic circuits. (French and German summaries) Digital Process. 4 (1978), no. 2, 109-120.  ...  An algorithm is presented for finding a minimal set of tests for diagnosis of single and multiple faults in combinational logic cit- cuits.  ... 

Automatic trouble isolation in duplex central controls employing matching

E. M. Prell
1967 Proceedings of the April 18-20, 1967, spring joint computer conference on - AFIPS '67 (Spring)  
For example, the logical tests used to test an adder during fault recognition would also be employed during diagnosis except that in diagnosis the matchers would be used to look at the input and output  ...  data for locating faults in digital machines IEEE Design Automation Workshop Michigan State U September 1966 7 HYCHANG WTHOMIS Methods of interpreting diagnostic data for locating faults in digital machines  ... 
doi:10.1145/1465482.1465606 dblp:conf/afips/Prell67 fatcat:7pe2wdblqbc5rhxmjtm725bvuy
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