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Unit-cost pointers versus logarithmic-cost addresses

1994
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Theoretical Computer Science
*

.,

doi:10.1016/0304-3975(93)00079-k
fatcat:y4pibnwwbnb5tn6c6fllolz7za
*Unit*-*cost**pointers**versus**logarithmic*-*cost**addresses*, Theoretical Computer Science 132 (1994) 377-385. The LISP Machine (LM) is a high-level model of computation using a linked memory structure. ... The hierarchical memory model (HMM) has a random access memory but takes into account the*cost*of memory access. We show that the HMM can be simulated by the LM in real time. ... Using this simulation, the tth memory access will*cost*O(a(s;)) instead of the usual*logarithmic**cost*. ...##
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Software-extended coherent shared memory

1994
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SIGARCH Computer Architecture News
*

A softwareonly directory architecture with no hardware

doi:10.1145/192007.192060
fatcat:jh23t6zu7nditm37ds5czuuyt4
*pointers*has lower performance but minimal*cost*. ... performance at a constant*cost*per processing element. ... All software-extended memory systems require a battery of architectural mechanisms to permit a designer to make the*cost**versus*performance tradeoff. ...##
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Vertical Object Layout and Compression for Fixed Heaps
[chapter]

2009
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Lecture Notes in Computer Science
*

This of course does not save RAM overall, but allows us to compare the

doi:10.1007/978-3-642-04164-8_18
fatcat:lds56ruvkbfczibswhjzkuhffm
*cost*of accessing ROM*versus*accessing RAM. ... Wilson [17] supports large*address*spaces with modest word sizes by using*pointer*swizzling at page fault time to translate large*pointers*into fewer bits. ...##
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Vertical object layout and compression for fixed heaps

2007
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Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems - CASES '07
*

This of course does not save RAM overall, but allows us to compare the

doi:10.1145/1289881.1289914
dblp:conf/cases/TitzerP07
fatcat:zmlriwnjzzf7nhdceuxhll57ji
*cost*of accessing ROM*versus*accessing RAM. ... Wilson [17] supports large*address*spaces with modest word sizes by using*pointer*swizzling at page fault time to translate large*pointers*into fewer bits. ...##
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Efficient communication and collection with compact normal forms

2015
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Proceedings of the 20th ACM SIGPLAN International Conference on Functional Programming - ICFP 2015
*

*Pointer*adjustment If the data associated with a compact region is not loaded into the same

*address*as its original

*address*, it is necessary to offset all of the internal

*pointers*so that they point to ... Both x and y scales are

*logarithmic*; bigger is better for CNF (and worse for the serializer being compared.) ...

##
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Efficient communication and collection with compact normal forms

2015
*
SIGPLAN notices
*

*Pointer*adjustment If the data associated with a compact region is not loaded into the same

*address*as its original

*address*, it is necessary to offset all of the internal

*pointers*so that they point to ... Both x and y scales are

*logarithmic*; bigger is better for CNF (and worse for the serializer being compared.) ...

##
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A Dynamic Hash Table for the GPU
[article]

2018
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arXiv
*
pre-print

Time is reported in

arXiv:1710.11246v2
fatcat:ftexqgcwmbctroysj6gt726nfa
*logarithmic*scale. Figure 7 : 7 (a) Concurrent benchmark for the slab hash: performance (M ops/s)*versus*initial memory utilization. ... node's*address*with its predecessor's next*pointer*. ...##
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Heads and tails

2001
*
Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '01
*

This addition can be organized as a parallel prefix sum using a carry-save adder tree, and so delay scales

doi:10.1145/502217.502244
dblp:conf/cases/PanA01
fatcat:m4xvhyxznzff5eeskic43kpljy
*logarithmically*with issue width Ç´ÐÓ Ïµ, and hardware*costs*grow as Ç´Ï ÐÓ Ïµ. ... MIPS16 [13] obtains a compression ratio of around 60%, but at the*cost*of limiting operations and operand*addressing*modes which reduces performance. ...##
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Heads and tails

2001
*
Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '01
*

This addition can be organized as a parallel prefix sum using a carry-save adder tree, and so delay scales

doi:10.1145/502239.502244
fatcat:2zst5i5q5zcebiuivbounr632m
*logarithmically*with issue width Ç´ÐÓ Ïµ, and hardware*costs*grow as Ç´Ï ÐÓ Ïµ. ... MIPS16 [13] obtains a compression ratio of around 60%, but at the*cost*of limiting operations and operand*addressing*modes which reduces performance. ...##
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A Tight Lower Bound for Decrease-Key in the Pure Heap Model
[article]

2014
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arXiv
*
pre-print

Algorithmica 1(1):111-129 (1986)] and surpasses it for pure-heap variants of numerous other heaps with augmented data such as

arXiv:1407.6665v1
fatcat:dnb2rjwu6vdonbinvffxmzmfgm
*pointer*rank-pairing heaps. ... We improve the lower bound on the amortized*cost*of the decrease-key operation in the pure heap model and show that any pure-heap-model heap (that has a n amortized-time extract-min operation) must spend ... All of these heaps also use indirect*addressing*or non-heap*pointers*. ...##
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Page 3620 of Mathematical Reviews Vol. , Issue 95f
[page]

1995
*
Mathematical Reviews
*

(IL-TLAV-C; Tel Aviv)

*Unit*-*cost**pointers**versus**logarithmic*-*cost**addresses*. (English summary) Theoret. Comput. Sci. 132 (1994), no. 1-2, 377-385. ... The hierarchical memory model (HMM) has a random access memory but takes into account the*cost*of memory access. We show that the HMM can be simulated by the LM in real time. ...##
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Write barrier elision for concurrent garbage collectors

2004
*
Proceedings of the 4th international symposium on Memory management - ISMM '04
*

Concurrent garbage collectors require write barriers to preserve consistency, but these barriers impose significant direct and indirect

doi:10.1145/1029873.1029876
dblp:conf/iwmm/VechevB04
fatcat:btr6fnfkarec5art2kvlncvb7a
*costs*. ... Intuitively, since the roots (stack*pointers*) are treated as a single*unit*, it does not matter if a*pointer*is copied from one stack location to another and then the first*pointer*is overwritten, because ... For instance, assume that the collector always scans objects from low to high*addresses*. ...##
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Why Some Heaps Support Constant-Amortized-Time Decrease-Key Operations, and Others Do Not
[chapter]

2014
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Lecture Notes in Computer Science
*

A lower bound is presented which shows that a class of heap algorithms in the

doi:10.1007/978-3-662-43948-7_53
fatcat:x4iqyq4embdwboxck72j3w6xti
*pointer*model with only heap*pointers*must spend Ω log log n log log log n amortized time on the Decrease-Key operation (given ... ACM 46(4):473-501 (1999)] who showed a tradeoff between the number of augmented bits and the amortized*cost*of Decrease-Key. A new heap data structure, the sort heap, is presented. ... All of these heaps also use indirect*addressing*or non-heap*pointers*. ...##
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Why some heaps support constant-amortized-time decrease-key operations, and others do not
[article]

2013
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arXiv
*
pre-print

A lower bound is presented which shows that a class of heap algorithms in the

arXiv:1302.6641v3
fatcat:f63whiaw3fe2fjt6b4gu54mduu
*pointer*model with only heap*pointers*must spend Omega(log log n / log log log n) amortized time on the decrease-key operation ... ACM 46(4):473-501 (1999)] who showed a tradeoff between the number of augmented bits and the amortized*cost*of decrease-key. A new heap data structure, the sort heap, is presented. ... All of these heaps also use indirect*addressing*or non-heap*pointers*. ...##
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Pointers versus Arithmetic in PRAMs

1996
*
Journal of computer and system sciences (Print)
*

A Parallel

doi:10.1006/jcss.1996.0063
fatcat:erap5qejjngt3ksfwfvr6pbn7a
*Pointer*Machine, (or PPM ) is a parallel model having*pointers*as its principal data type. ... We present results concerning the relative power of PPMs (and other arithmetically restricted PRAMs)*versus*CROW PRAMs having ordinary arithmetic capabilities. ... Deep insight into the power of such machines is provided by Sch onhage's demonstration of the equivalence of SMMs and*unit*-*cost*successor RAMs, i.e., ordinary*unit**cost*RAMs stripped of all arithmetic ...
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