Filters








44,954 Hits in 3.9 sec

Understanding and Optimizing Persistent Memory Allocation [article]

Wentao Cai, Haosen Wen, H. Alan Beadle, Chris Kjellqvist, Mohammad Hedayati, Michael L. Scott
2020 arXiv   pre-print
Experiments show Ralloc to be performance-competitive with both Makalu, the state-of-the-art lock-based persistent allocator, and such transient allocators as LRMalloc and JEMalloc.  ...  For full generality, such data requires dynamic memory allocation, and while the allocator could in principle "rolled into" each data structure, it is desirable to make it a separate abstraction.  ...  Near-term plans include the addition of general cross-heap persistent pointers, integration with persistent libraries [20] , parallelized and optimized recovery, and detection and (stop-the-world) recovery  ... 
arXiv:2003.06718v1 fatcat:x4ig7vil2zd5tkmsqnxe7r6pye

Understanding and optimizing persistent memory allocation

Wentao Cai, Haosen Wen, H. Alan Beadle, Mohammad Hedayati, Michael L. Scott
2020 Proceedings of the 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming  
Experiments show Ralloc to be performance-competitive with both Makalu, the state-of-theart lock-based persistent allocator, and such transient allocators as LRMalloc and JEMalloc.  ...  For full generality, such data requires dynamic memory allocation, and while the allocator could in principle be "rolled into" each data structure, it is desirable to make it a separate abstraction.  ...  Near-term plans include the addition of general cross-heap persistent pointers, integration with persistent libraries [20] , parallelized and optimized recovery, and detection and (stop-the-world) recovery  ... 
doi:10.1145/3332466.3374502 dblp:conf/ppopp/CaiWBHS20 fatcat:tor2ycf5i5fv3jhadfwmsmzpye

Profiling and Performance [chapter]

Steve Scargall
2020 Programming Persistent Memory  
Performance optimization largely involves identifying the current performance bottleneck and improving it.  ...  Therefore, understanding the mix of loads and stores in an application workload is important for understanding and optimizing performance.  ...  This section outlines several important performance considerations you should understand to profile and optimize persistent memory performance and defines the terms and situations we use in this chapter  ... 
doi:10.1007/978-1-4842-4932-1_15 fatcat:g3a4lo4z3vbglnkakeyoodc6hi

Persistent Memory Transactions [article]

Virendra Marathe, Achin Mishra, Amee Trivedi, Yihe Huang, Faisal Zaghloul, Sanidhya Kashyap, Margo Seltzer, Tim Harris, Steve Byan, Bill Bridge, Dave Dice
2018 arXiv   pre-print
We compare three implementations of transaction runtimes: undo logging, redo logging, and copy-on-write. We also present a memory allocator that plugs into these runtimes.  ...  workloads, size of the persistence domain (portion of the memory hierarchy where the data is effectively persistent), cache locality, and transaction runtime bookkeeping overheads.  ...  [22] present a memory allocator optimized for wear leveling, which can plug easily into our allocation log technique. Volos et al.  ... 
arXiv:1804.00701v1 fatcat:3lfj7ldnb5gxpaj6ha5b7ljulm

Reducing the cost of persistence for nonvolatile heaps in end user devices

Sudarsun Kannan, Ada Gavrilovska, Karsten Schwan
2014 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)  
This paper analyzes and quantifies in detail the performance overheads of persistence, which include (1) the aforementioned cache interference as well as (2) memory allocator overheads, and finally, (3  ...  Specifically, while increasing memory capacity can be gained by treating NVM as virtual memory, its use of persistent data storage incurs high consistency (frequent cache flushes) and durability (logging  ...  Acknowledgments This research is supported in part by the Intel URO program on software for persistent memories and by NSF award CCF-1161969.  ... 
doi:10.1109/hpca.2014.6835960 dblp:conf/hpca/KannanGS14 fatcat:45daodexbjbhzhhy5zvdoks5cm

NVM heaps for accelerating browser-based applications

Sudarsun Kannan, Ada Gavrilovska, Karsten Schwan, Sanjay Kumar
2013 Proceedings of the 1st Workshop on Interactions of NVM/FLASH with Operating Systems and Workloads - INFLOW '13  
By using NVM as virtual memory, and integrating NVM support for browser applications with byte addressable I/O interfaces, our approach shows up to 3.5x reduction in sandboxing cost and around 3x reduction  ...  To address this, we explore the utility of next generation non-volatile memories (NVM) in client platforms.  ...  All metadata is maintained in persistent memory. Sandboxing specific allocator optimizations.  ... 
doi:10.1145/2527792.2527796 dblp:conf/sosp/KannanGSK13 fatcat:6yorwulvzjg5bpy7ojnszutyx4

Energy Aware Persistence

Sudarsun Kannan, Moinuddin Qureshi, Ada Gavrilovksa, Karsten Schwan
2016 Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16  
Next generation byte addressable nonvolatile memories (NVMs) such as PCM, Memristor, and 3D X-Point are attractive solutions for mobile and other end-user devices, as they offer memory scalability as well  ...  and a memory management method that reduces energy by trading capacity via less frequent garbage collection.  ...  This work was supported in part by the Intel URO program on software for persistent memories, and by C-FAR, one of the six SRC STARnet Centers, sponsored by MARCO and DARPA.  ... 
doi:10.1145/2967938.2967953 dblp:conf/IEEEpact/KannanQGS16 fatcat:bqpkeh6ocfhmzcscbvogalxz2m

The Functional Resource Hypothesis as a Basis for Understanding Cognitive Workload in Immediate Interactive Behavior

Jason Ralph, Wayne D. Gray, Michael J. Schoelles
2009 Proceedings of the Human Factors and Ergonomics Society Annual Meeting  
To reduce cognitive workload and overload, the Functional Resource Hypothesis maintains that an optimal allocation of interactive routines to task performance would be based on the functional resource  ...  Understanding workload requires understanding the control of cognition at the 1/3 to 3s time span during which cognitive, perceptual, and motor operations become bound together into interactive routines  ...  Understanding optimization at this millisecond level of analysis can provide a theoretical foundation for understanding workload at longer time intervals, such as the level of 10s of seconds or minutes  ... 
doi:10.1177/154193120905300450 fatcat:hgfiei4tqngx7o6j4veakbqb74

The Functional Resource Hypothesis as a Basis for Understanding Cognitive Workload in Immediate Interactive Behavior

Jason Ralph, Wayne D. Gray, Michael J. Schoelles
2009 Proceedings of the Human Factors and Ergonomics Society Annual Meeting  
To reduce cognitive workload and overload, the Functional Resource Hypothesis maintains that an optimal allocation of interactive routines to task performance would be based on the functional resource  ...  Understanding workload requires understanding the control of cognition at the 1/3 to 3s time span during which cognitive, perceptual, and motor operations become bound together into interactive routines  ...  Understanding optimization at this millisecond level of analysis can provide a theoretical foundation for understanding workload at longer time intervals, such as the level of 10s of seconds or minutes  ... 
doi:10.1518/107118109x12524441081668 fatcat:e3rw23bhlre5dfoassr2x7siti

Efficient Kernel Object Management for Tiered Memory Systems with KLOC [article]

Sudarsun Kannan, Yujie Ren, Abhishek Bhatacharjee
2020 arXiv   pre-print
Software-controlled heterogeneous memory systems have the potential to improve performance, efficiency, and cost tradeoffs in emerging systems.  ...  Unfortunately, modern OSes do not support efficient tiering of data between heterogeneous memories.  ...  of the persistent memory.  ... 
arXiv:2004.04760v1 fatcat:23baz7oi6vdgtatw5ltuok4rne

Tiered Object Storage using Persistent Memory [article]

Johnu George, Ramdoot Pydipaty, Xinyuan Huang, Amit Saha, Debo Dutta, Gary Wang, Uma Gangumalla
2018 arXiv   pre-print
the memory footprint of operations.  ...  Since NVM provides fast, byte-addressable access to durable memory, it is possible to access various fields of an object stored in NVM directly without incurring any serialization and deserialization cost  ...  There are allocators for system memory, persistent memory, HDD, SSD, and distributed file systems like Ceph.  ... 
arXiv:1807.06417v1 fatcat:4wieb3uixvepjlrksuewxglanu

PMDK Internals: Important Algorithms and Data Structures [chapter]

Steve Scargall
2020 Programming Persistent Memory  
Chapters 5 through 10 describe most of the libraries contained within the Persistent Memory Development Kit (PMDK) and how to use them.  ...  This chapter introduces the fundamental algorithms and data structures on which libpmemobj is built.  ...  Before diving deeper into this topic, we briefly describe the principles behind normal volatile allocators so you can understand how persistent memory impacts the status quo.  ... 
doi:10.1007/978-1-4842-4932-1_16 fatcat:d3zk253uzrhehm36q2rv4v5kli

HeteroCheckpoint: Efficient Checkpointing for Accelerator-Based Systems

Sudarsun Kannan, Naila Farooqui, Ada Gavrilovska, Karsten Schwan
2014 2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks  
This paper introduces a unified CPU-GPU checkpoint mechanism, which can efficiently checkpoint the combined GPU-CPU memory state resident on machine nodes.  ...  Moving toward exascale, the number of GPUs in HPC machines is bound to increase, and applications will spend increasing amounts of time running on those GPU devices.  ...  ACKNOWLEDGMENT This research is supported in part by an Intel award for research on non-volatile memory and by the DOE Exact Center for Exascale Simulation.  ... 
doi:10.1109/dsn.2014.76 dblp:conf/dsn/KannanFGS14 fatcat:rjh3hucedfaazggvywauimyctu

Volatile Use of Persistent Memory [chapter]

Steve Scargall
2020 Programming Persistent Memory  
When using libmemkind with DRAM and persistent memory, the key points to understand are: • Two pools of memory are available to the application, one from DRAM and another from persistent memory. • Both  ...  The code example in Listing 10-7 shows how to allocate memory from DRAM and persistent memory (pmem_kind) using memkind_malloc().  ... 
doi:10.1007/978-1-4842-4932-1_10 fatcat:phmg2zfoejhh5ewzkntoyyjcnu

Consistent, durable, and safe memory management for byte-addressable non volatile main memory

Iulian Moraru, David G. Andersen, Michael Kaminsky, Niraj Tolia, Parthasarathy Ranganathan, Nathan Binkert
2013 Proceedings of the First ACM SIGOPS Conference on Timely Results in Operating Systems - TRIOS '13  
Taking the fullest advantage of the low latency and high bandwidths of emerging memories such as phase change memory (PCM), spin torque, and memristor necessitates a serious look at placing these persistent  ...  This paper presents three building blocks for enabling the efficient and safe design of persistent data stores for emerging non-volatile memory technologies.  ...  This research was funded in part by Intel via the Intel Science and Technology Center for Cloud Computing (ISTC-CC), by the National Science Foundation under award CCF-0964474, and by gifts from HP and  ... 
doi:10.1145/2524211.2524216 dblp:conf/sosp/MoraruAKTRB13 fatcat:zdl5jowcqjgc7pnt763d42iwyq
« Previous Showing results 1 — 15 out of 44,954 results