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Formal Verification of Hardware Components in Critical Systems

Wilayat Khan, Muhammad Kamran, Syed Rameez Naqvi, Farrukh Aslam Khan, Ahmed S. Alghamdi, Eesa Alsolami
2020 Wireless Communications and Mobile Computing  
In this paper, we define a lightweight mathematical framework in computer-based theorem prover Coq for describing and reasoning about Boolean algebra and hardware components (logic circuits) modelled as  ...  Hardware components, such as memory and arithmetic units, are integral part of every computer-controlled system, for example, Unmanned Aerial Vehicles (UAVs).  ...  Acknowledgments e authors would like to extend their sincere appreciation to the Deanship of Scientific Research at King Saud University, Saudi Arabia, for partially funding this  ... 
doi:10.1155/2020/7346763 fatcat:nwrynuotc5h3zarf5iuri7l4si

Algebraic Techniques in Software Verification : Challenges and Opportunities

Martin Brain, Daniel Kroening, Ryan McCleeary
2016 Symposium on Symbolic and Numeric Algorithms for Scientific Computing  
The requirements of software verification are somewhat different to other applications of automated reasoning, posing a number of challenges but also providing some interesting opportunities.  ...  This paper brings together and summarises the algebras and structures of interest, along with some of the problems that are characteristic of software verification.  ...  It is hoped that this paper acts as a guide for computer algebra researchers to understand this synergy, and appreciate some of the places algebraic approaches could be fruitfully deployed and to get involved  ... 
dblp:conf/synasc/BrainKM16 fatcat:w4o6jetf2nacpesqvmjuywf7xe

Verification of Infinite State Systems [chapter]

Ahmed Bouajjani
2003 Lecture Notes in Computer Science  
Both process algebras (or term rewriting systems) and automata (or finite control machines) are being used as specification formalisms.  ...  The verification problem consists in checking whether a system satisfies its specification.  ...  Model checking has become a central methodology for automated verification of reactive systems.  ... 
doi:10.1007/978-3-540-45220-1_7 fatcat:4j5lzdbfc5hd7ptdo4tpwvmd2m

Pi-Ware: Hardware Description and Verification in Agda

João Paulo Pizani Flor, Wouter Swierstra, Yorick Sijsling, Marc Herbstritt
2018 Types for Proofs and Programs  
There is a long tradition of modelling digital circuits using functional programming languages.  ...  We demonstrate this by defining an algebra of parallel prefix circuits, proving their correctness and further algebraic properties.  ...  The participation in other venues such as for instance the Midlands Graduate School 2015 in Sheffield was also very fruitful in allowing discussions about the typetheoretical underpinnings of this work  ... 
doi:10.4230/lipics.types.2015.9 dblp:conf/types/FlorSS15 fatcat:cfswwcfherbinipoj363hl722a

Verified Implementation of an Efficient Term-Rewriting Algorithm for Multiplier Verification on ACL2

Mertcan Temel
2022 Electronic Proceedings in Theoretical Computer Science  
We show how to utilize a theorem prover, ACL2, to implement an efficient rewriting algorithm for multiplier design verification.  ...  Automatic and efficient verification of multiplier designs, especially through a provably correct method, is a difficult problem.  ...  Listing 2: A simplified correctness conjecture for a signed 64x64-bit multiplier with SVL semantics Fig. 1 shows the rewriting flow when simplifying a multiplier design conjecture.  ... 
doi:10.4204/eptcs.359.11 fatcat:7bo6dxtwffci7k5urqb3j6yygm

Automated deduction for verification

Natarajan Shankar
2009 ACM Computing Surveys  
The second part (Section 3) covers satisfiability procedures for propositional logic and fragments of first-order logic including theories such as linear arithmetic, arrays, and bit vectors.  ...  Equational logic is a fragment of first-order logic that provides the foundation for algebraic reasoning using equalities.  ...  ACKNOWLEDGMENTS Tony Hoare and Jayadev Misra suggested the idea for this survey article and shepherded it through many revisions with copious feedback, advice, and encouragement.  ... 
doi:10.1145/1592434.1592437 fatcat:satgicglyneqvl2nw5pjnr3d3a

New developments in the theory of Groebner bases and applications to formal verification [article]

Michael Brickenstein, Alexander Dreyer, Gert-Martin Greuel, Markus Wedler, Oliver Wienand
2008 arXiv   pre-print
In fact, algebraic modelling of formal verification problems is developed on the word-level as well as on the bit-level.  ...  The word-level model leads to Groebner basis in the polynomial ring over Z/2n while the bit-level model leads to Boolean Groebner bases.  ...  In section 1 we describe the formal verifica-tion of digital circuits and its algebraic modelling via word-level and bit-level encoding.  ... 
arXiv:0801.1177v2 fatcat:4mhhle6ssjfjlpf7bntrrd6bcq

A Symbolic Methodology for the Verification of Analog and Mixed Signal Designs

Ghiath Al-Sammane, Mohamed H. Zaki, Sofiene Tahar
2007 2007 Design, Automation & Test in Europe Conference & Exhibition  
We propose a new symbolic verification methodology for proving the properties of analog and mixed signal (AMS) designs.  ...  These normalized equations are used along with an induction verification strategy defined inside the computer algebra system Mathematica to prove the correctness of the properties.  ...  The verification of AMS systems, however, is a challenging task that requires lots of expertise and deep understanding of the system behavior.  ... 
doi:10.1109/date.2007.364599 dblp:conf/date/Al-SammaneZT07 fatcat:o5zb7g3qb5ch5aygqvvbexljui

Formal Verification of Explicitly Parallel Microprocessors [chapter]

Byron Cook, John Launchbury, John Matthews, Dick Kieburtz
1999 Lecture Notes in Computer Science  
Acknowledgments For their contributions to this research, we thank Mark Aagaard Acknowledgements We wish to thank Byron Cook, Sava Krstic, and John Launchbury for their valuable contributions to this  ...  The author is supported by a graduate research fellowship with the National Science Foundation, and grants from the Air Force Material Command (F19628-93-C-0069) and Intel Strategic CAD Labs.  ...  We omit the proof of the following lemma since it is really a bit of folklore in term rewriting.  ... 
doi:10.1007/3-540-48153-2_4 fatcat:pd5w6ggq6fdpxfeqwiprqxintu

Automated Formal Equivalence Verification of Pipelined Nested Loops in Datapath Designs [article]

Payman Behnam, Bijan Alizadeh, Sajjad Taheri
2017 arXiv   pre-print
The empirical results demonstrate the efficiency and scalability of our proposed method in terms of run-time and memory usage for several large designs synthesized by a commercial behavioral synthesis  ...  Our proposed method enables us to deal with the equivalence checking problem for behaviorally synthesized designs even in the presence of pipelines for nested loops.  ...  a formal model, and availability of arithmetic operations in a word-level, has made it a powerful and scalable platform for verification [25, 27, 33, 37, 41, 42] .  ... 
arXiv:1712.09818v1 fatcat:xfnkdt765nfhvnfnujgs7rscpm

Introduction to Neural Network Verification [article]

Aws Albarghouthi
2021 arXiv   pre-print
This book covers foundational ideas from formal verification and their adaptation to reasoning about neural networks and deep learning.  ...  At the end of the day, all programs can be defined as circuits, because everything is a bit on a computer and there is a finite amount of memory, and therefore a finite number of variables.  ...  For neural-network verification, interval arithmetic first appeared in a number of papers starting in 2018 Gowal et al., 2018; Wang et al., 2018) .  ... 
arXiv:2109.10317v2 fatcat:abc6pneupzbrre2uwiamvnqk2e

On the Verification of a WiMax Design Using Symbolic Simulation

Salim Ismail Al-Akhras, Sofiène Tahar, Gabriela Nicolescu, Michel Langevin, Pierre Paulin
2013 Electronic Proceedings in Theoretical Computer Science  
In this paper, we propose a methodology for the verification of conformance of models generated at higher levels of abstraction in the design process to the design specifications.  ...  We model the system behavior using sequence of recurrence equations. We then use symbolic simulation together with equivalence checking and property checking techniques for design verification.  ...  Then, we execute each model for a certain number of times using a rewriting based symbolic simulator.The symbolic simulator is implemented inside the computer algebra system,Mathematica 6.0 [4].  ... 
doi:10.4204/eptcs.122.3 fatcat:5lu7oucvrra3tn3bgzuyoxvh3m

A Framework for the High-Level Specification and Verification of Synchronous Digital Logic Systems [article]

Nick Mertin, Richard Ean, Karen Rudie
2022 arXiv   pre-print
A syntactic model is presented for the specification of finite-state synchronous digital logic systems with complex input/output interfaces, which control the flow of data between opaque computational  ...  Using the automaton model, the problem of timing-agnostic verification of closed-loop systems against a desired behavioural specification, encoded as the similarity of closed-loop systems in terms of the  ...  Cette recherche a été financée par le Conseil de recherches en sciences naturelles et en génie du Canada (CRSNG), numéros de référence USRA-563528-2021 et RGPIN-2020-04279.  ... 
arXiv:2201.10632v1 fatcat:h3kxoly7n5dg7evypnh6w5sk3y

New developments in the theory of Gröbner bases and applications to formal verification

Michael Brickenstein, Alexander Dreyer, Gert-Martin Greuel, Markus Wedler, Oliver Wienand
2009 Journal of Pure and Applied Algebra  
In fact, algebraic modelling of formal verification problems is developed on the word-level as well as on the bit-level.  ...  The word-level model leads to Gröbner basis in the polynomial ring over Z/2 n while the bit-level model leads to Boolean Gröbner bases.  ...  Hibi for organizing this conference and for his hospitality.  ... 
doi:10.1016/j.jpaa.2008.11.043 fatcat:kuyur27d6rgsvpyv7glwrqubzy

Sciduction: Combining Induction, Deduction, and Structure for Verification and Synthesis [article]

Sanjit A. Seshia
2012 arXiv   pre-print
Inductive inference, which generalizes from specific instances to yield a concept, includes algorithmic learning from examples.  ...  The major challenges include environment modeling, incompleteness in specifications, and the complexity of underlying decision problems.  ...  In particular, Susmit Jha is a major contributor to this work, especially to  ... 
arXiv:1201.0979v1 fatcat:ij726hwu3faytg3knqrmp5trjq
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