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Unbounded fan-in circuits and associative functions

Ashok K. Chandra, Steven Fortune, Richard Lipton
1985 Journal of computer and system sciences (Print)  
The computation of finite semigroups using unbounded fan-in circuits are considered.  ...  A consequence is that the same bounds apply for circuits computing the sum of two n-bit numbers. 0 UNBOUNDED FAN-IN CIRCUITS 223 At least two models of unbounded fan-in parallelism have been proposed.  ...  ASSOCIATIVE FUNCTIONS The main theorem proved in this section is a characterization of the associative functions that can be computed by constant depth, polynomial size circuits.  ... 
doi:10.1016/0022-0000(85)90015-7 fatcat:d6qdktcnobggto6y4n5xflxcki

The complexity of the parity function in unbounded fan-in, unbounded depth circuits

Ingo Wegener
1991 Theoretical Computer Science  
., The complexity of the parity function in unbounded fan-in, unbounded depth circuits, Theoretical Computer Science 85 (1991) 155-170.  ...  Almost everything is known on the complexity of the parity function in fan-in 2 circuits over various bases.  ...  Nevertheless, it is useful to investigate the complexity of the parity functions in unbounded fan-in NOR circuits.  ... 
doi:10.1016/0304-3975(91)90052-4 fatcat:x4skzcjwdfgw7fyamfwgwup2zi

Lower bounds on monotone arithmetic circuits with restricted depths

Joseph JáJá
1985 Computers and Mathematics with Applications  
We consider monotone arithmetic circuits with restrlcted depths to compute monotone multivariate polynomials such as the elementary symmetric functions. convolution of several vectors and raismg a matrix  ...  We develop general lower-and upper-bound techniques that seem to generate almost-matching bounds for all the functions consldered.  ...  Acknowledgemenr-This work was supported in part by the National Science Foundation under Grant MCS-X3-15980.  ... 
doi:10.1016/0898-1221(85)90103-8 fatcat:3fmwnigfwrb65piqxgqsm7gz5u

Boolean complexity classes vs. their arithmetic analogs

Anna Gál, Avi Wigderson
1996 Random structures & algorithms (Print)  
Recall that SAC 1 , the circuit analog of N L, is the class of Boolean circuits of depth O(log n) over {∨, ∧, ¬} with unbounded fan-inand bounded fan-in ∧ gates.  ...  The class ⊕SAC 1 , the circuit analog of ⊕L, is the class of arithmetic circuits of depth O(log n) over {⊕, ×}, with unbounded fan-inand bounded fan-in × gates. Clearly ⊕L/poly ⊆ ⊕SAC 1 .  ...  Acknowledgements Venkateswaran independently suggested a similar construction for the circuit result [V2].  ... 
doi:10.1002/(sici)1098-2418(199608/09)9:1/2<99::aid-rsa7>3.3.co;2-o fatcat:vx7x7v7cj5dfvpj6m4d7cm3cr4

Boolean complexity classes vs. their arithmetic analogs

Anna G�l, Avi Wigderson
1996 Random structures & algorithms (Print)  
Recall that SAC 1 , the circuit analog of N L, is the class of Boolean circuits of depth O(log n) over {∨, ∧, ¬} with unbounded fan-inand bounded fan-in ∧ gates.  ...  The class ⊕SAC 1 , the circuit analog of ⊕L, is the class of arithmetic circuits of depth O(log n) over {⊕, ×}, with unbounded fan-inand bounded fan-in × gates. Clearly ⊕L/poly ⊆ ⊕SAC 1 .  ...  Acknowledgements Venkateswaran independently suggested a similar construction for the circuit result [V2].  ... 
doi:10.1002/(sici)1098-2418(199608/09)9:1/2<99::aid-rsa7>3.0.co;2-6 fatcat:whcehawyzndv7hd6eyuurt2a7a

Page 2404 of Mathematical Reviews Vol. , Issue 96d [page]

1996 Mathematical Reviews  
It is shown that unbounded fan-in circuits of linear size and depth, proportional to the inverse of Ackerman’s function, exist for computing prefixes.  ...  In Part Four the effects of bounded versus unbounded fan-in and fan-out are examined.  ... 

Unambiguity of circuits

Klaus-Jörn Lange
1993 Theoretical Computer Science  
In particular, we show CREW-TIME(logk n)= UnambAC" for each positive integer k. ing Turing machine, and depth of a uniform circuit of semi-unbounded fan-in [18, 241, and  ...  Several classes of unambiguous circuit families within the NC-hierarchy are introduced and related to unambiguous automata and to PRAMS with exclusive write access.  ...  the corresponding cell might be destroyed; and assume the circuit to avoid any multiple l-input to OR-gates of unbounded fan-in (multiple O-input to AND-gates of unbounded fan-in).  ... 
doi:10.1016/0304-3975(93)90255-r fatcat:hafq2x7k4vdyhledp7wuklmnpm

Semantical Counting Circuits

Noilhan, Santha
2003 Theory of Computing Systems  
In the circuit based model, it was done for #P , but for low-level complexity classes such as #AC 0 and #NC 1 only the syntactical definitions were considered.  ...  We also consider semantically defined probabilistic complexity classes corresponding to AC 0 and NC 1 and prove that in the case of unbounded error, they are identical to their syntactical counterparts  ...  An AC 0 circuit family is a uniform, unbounded fan-in circuit family of polynomial size and constant depth.  ... 
doi:10.1007/s00224-003-1023-8 fatcat:ekuvystb4fd45bfd67rp42z5ga

Semantical Counting Circuits [chapter]

Fabrice Noilhan, Miklos Santha
2000 Lecture Notes in Computer Science  
In the circuit based model, it was done for #P , but for low-level complexity classes such as #AC 0 and #NC 1 only the syntactical definitions were considered.  ...  We also consider semantically defined probabilistic complexity classes corresponding to AC 0 and NC 1 and prove that in the case of unbounded error, they are identical to their syntactical counterparts  ...  An AC 0 circuit family is a uniform, unbounded fan-in circuit family of polynomial size and constant depth.  ... 
doi:10.1007/3-540-46521-9_8 fatcat:6upnuqmh3vbrhdrhvxyuqttxnu

Optimal bounds for decision problems on the CRCW PRAM

P. Beame, J. Hastad
1987 Proceedings of the nineteenth annual ACM conference on Theory of computing - STOC '87  
Furthermore, we show that almost all Boolean functions of n bits require logn -log log n + Q( 1) time when the number of processors is at most polynomial in n.  ...  We prove optimal R(log n/log log n) lower bounds on the time for CRCW PRAM's with polynomially bounded numbers of processors or memory cells to compute parity and a number of related problems.  ...  log n) for unbounded fan-in circuits given by Chandra, Stockmeyer and Vishkin [CSV] .  ... 
doi:10.1145/28395.28405 dblp:conf/stoc/BeameH87 fatcat:kepq6msierfdtixy4vvshmnzlm

Optimal bounds for decision problems on the CRCW PRAM

Paul Beame, Johan Hastad
1989 Journal of the ACM  
Furthermore, we show that almost all Boolean functions of n bits require logn -log log n + Q( 1) time when the number of processors is at most polynomial in n.  ...  We prove optimal R(log n/log log n) lower bounds on the time for CRCW PRAM's with polynomially bounded numbers of processors or memory cells to compute parity and a number of related problems.  ...  log n) for unbounded fan-in circuits given by Chandra, Stockmeyer and Vishkin [CSV] .  ... 
doi:10.1145/65950.65958 fatcat:tja3jvt6yrckncrkqzouzi7vxi

Power of uninitialized qubits in shallow quantum circuits

Yasuhiro Takahashi, Seiichiro Tani
2020 Theoretical Computer Science  
First, we show that such a circuit can compute any symmetric function on n bits that is classically computable in polynomial time.  ...  Lastly, to understand the limitations of uninitialized ancillary qubits, we focus on near-logarithmic-depth quantum circuits with them and show the impossibility of computing the parity function on n bits  ...  it consists of the gates in G, unbounded fan-out gates, and unbounded Z gates.  ... 
doi:10.1016/j.tcs.2020.11.039 fatcat:ofbjnujnzve2vo375uafbixb34

Power of Uninitialized Qubits in Shallow Quantum Circuits [article]

Yasuhiro Takahashi, Seiichiro Tani
2017 arXiv   pre-print
First, we show that such a circuit can compute any symmetric function on n bits that is classically computable in polynomial time.  ...  Lastly, to understand the limitations of uninitialized ancillary qubits, we focus on near-logarithmic-depth quantum circuits with them and show the impossibility of computing the parity function on n bits  ...  of the OR reduction circuit, and then compute g m (s) = f n (x), where g m is the Boolean function associated with f n described above.  ... 
arXiv:1608.07020v2 fatcat:5xf2mupb2vb4bmptyn7r4demm4

Nonlinear lower bounds on the number of processors of circuits with sublinear separators

Juraj Hromkovič
1991 Information and Computation  
The above stated result holds also for unbounded fan-in, fan-out Boolean circuits.  ...  A nonlinear lower bound on the number of processors is achieved also for planar VLSI circuits computing some one-output Boolean functions in time O(nb) for b<;. 'f=.  ...  Let f: { 0, 1 }" -+ (0, 1 } be a Boolean function with the set of input variables X. Let S be an unbounded fan-in Boolean circuit computing f.  ... 
doi:10.1016/0890-5401(91)90041-y fatcat:tqmihtdv3rcgnk7auok7y7svsq

Nonlinear lower bounds on the number of processors of circuits with sublinear separators [chapter]

Juraj Hromkovič
1991 Lecture Notes in Computer Science  
The above stated result holds also for unbounded fan-in, fan-out Boolean circuits.  ...  A nonlinear lower bound on the number of processors is achieved also for planar VLSI circuits computing some one-output Boolean functions in time O(nb) for b<;. 'f=.  ...  Let f: { 0, 1 }" -+ (0, 1 } be a Boolean function with the set of input variables X. Let S be an unbounded fan-in Boolean circuit computing f.  ... 
doi:10.1007/3-540-54458-5_68 fatcat:xq3qnvriyrbedhdkjk7pnlrk2q
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