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UMTS MPSoC design evaluation using a system level design framework

D. Densmore, A. Simalatsar, A. Davare, R. Passerone, A. Sangiovanni-Vincentelli
2009 2009 Design, Automation & Test in Europe Conference & Exhibition  
We illustrate the design methodology on a UMTS data link layer design case study with both a timed and untimed functional model as well as a complete set of MPSoC architectural services.  ...  We describe how to use a new event-based design framework, Metro II, to carry out simulation and design space exploration of multi-core architectures.  ...  In this paper we discuss the use of a new event-based design framework, Metro II [4] , for the simulation and design of multiprocessor platforms and present a non-trivial UMTS case study to show the results  ... 
doi:10.1109/date.2009.5090712 dblp:conf/date/DensmoreSDPS09 fatcat:5iiqavkegrf4vd5fgonanb7b5y

Development and validation of Nessie: a multi-criteria performance estimation tool for SoC

Alienor Richard, Cedric Hernalsteens, Frederic Robert
2009 2009 Ph.D. Research in Microelectronics and Electronics  
A three-level hierarchical model description The methodology used to build the framework of the evaluation tool is shown in the figure 3.1.  ...  In a classical top-down design flow, the system is designed progressively, starting from a high level of abstraction where the system is described roughly to lower levels of abstraction where we have an  ...  If the shared register enables full the corresponding values of the criteria 21 Appendix C A complement to the Future Work As perspective for the use of our tool in industrial design, we have thus  ... 
doi:10.1109/rme.2009.5201349 fatcat:lk2x6luvzzfopl24okg723lfhu

State of the art baseband DSP platforms for Software Defined Radio: A survey

Omer Anjum, Tapani Ahonen, Fabio Garzia, Jari Nurmi, Claudio Brunelli, Heikki Berg
2011 EURASIP Journal on Wireless Communications and Networking  
Software Defined Radio (SDR) is an innovative approach which is becoming a more and more promising technology for future mobile handsets.  ...  Several proposals in the field of embedded systems have been introduced by different universities and industries to support SDR applications.  ...  It can be used as a single accelerator or as a part of heterogeneous MPSoC. It comes with its own design tools named as Montium Sensation Suite which has a Compiler, Simulator and Editor.  ... 
doi:10.1186/1687-1499-2011-5 fatcat:apmz6jd4cbdcrpb76qnungmirq

Heterogeneous MP-SoC

Tim Kogel, Heinrich Meyr
2004 Proceedings of the 41st annual conference on Design automation - DAC '04  
On the other hand, the design-driven approach strives to take design efficiency to the required level by use of system level design methodologies and IP generation tools.  ...  Based on the analysis of recent trends in computer architecture and system level design, we envision a hand-in-hand approach of signal processing platform architectures and design metholodgy to conquer  ...  Additionally, system houses more and more refuse to pay royalties for COTS IP. We envision a convergence of EDA and IP products on the basis of a two-phase system level design flow.  ... 
doi:10.1145/996566.996754 dblp:conf/dac/KogelM04 fatcat:oiiscg6pwffrhbpj2daf45uxcu

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties

Ralph Gorgen, Kim Gruttner, Fernando Herrera, Pablo Penil, Julio Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva (+10 others)
2016 2016 Euromicro Conference on Digital System Design (DSD)  
System Modeling Layer The objective of this activity is to experiment with the use of a modeling and design framework based on models of computations (MoCs) on the critical tasks of the application software  ...  We will focus on the framework named ForSyDe (Formal System Design) providing modeling libraries and tools developed by KTH.  ...  At all levels, but especially for in-field devices, power consumption is a critical issue.  ... 
doi:10.1109/dsd.2016.95 dblp:conf/dsd/GorgenGHPMVPFBG16 fatcat:t4f6yfdmrnfwfozoj2iveywwna

Tomahawk

Oliver Arnold, Emil Matus, Benedikt Noethen, Markus Winter, Torsten Limberg, Gerhard Fettweis
2014 ACM Transactions on Embedded Computing Systems  
For this reason, the efficient implementation of the CoreManager becomes a major issue in system design.  ...  Apart from the definition of the system architecture, in this approach a unified framework including a model of computation, a programming interface and a dedicated runtime management unit called CoreManager  ...  Tavares and Marcel Bimberg for their contribution to design and development of MPSoC prototype.  ... 
doi:10.1145/2517087 fatcat:ciu373xpc5agrihdnpmali2euy

A dynamically reconfigurable architecture for emergency and disaster management in ITS

Smail Niar, Arda Yurdakul, Osman Unsal, Tuna Tugcu, Aziz Yuceturk
2014 2014 International Conference on Connected Vehicles and Expo (ICCVE)  
The challenge in our framework is the proposition of a range of innovative solutions for intelligent and efficient traffic management in Emergency and Disaster Management (EDM).  ...  Current transportation infrastructures are not designed to handle unexpected and undesired events or disasters.  ...  Hence, a programmable heterogeneous Multi-Processor System-on-Chip (MPSoC) that contains an FPGA with multiple processing cores is used here to appropriately deal with the requirements of real-time streaming  ... 
doi:10.1109/iccve.2014.7297593 dblp:conf/iccve/NiarYUTY14 fatcat:2laofv6ckvarthjxtoscyd4lli

Table of Contents

2019 2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT)  
573-579 112 521 Design and Implementation of Web-Server Application on Xilinx Zynq MPSoC FPGA Based Evaluation Platform 580-584 113 532 Power Factor Preregulator for Power Factor Improvement  ...  Energy Harvesting Based Relaying Sensor Networks 491-495 96 729 Home Automation Using Brain Waves 496-499 97 456 A Centralized Management System Software Framework to aid in EV Charging  ... 
doi:10.1109/rteict46194.2019.9016925 fatcat:3azpzwfoljdhpkx5h3addkc4ga

The M2DC Project: Modular Microserver DataCentre

Mariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges (+13 others)
2016 2016 Euromicro Conference on Digital System Design (DSD)  
Nevertheless, every application field introduces special requirements to the used computational architecture.  ...  This paper provides an overview of the different topics FPGAs have been used for in the last 15 years of research and why they have been chosen over other processing units like e.g. CPUs.  ...  The complexity of the test scenario can include the design of a whole system level environment in order to ensure the correct behavior of the tested device.  ... 
doi:10.1109/dsd.2016.76 dblp:conf/dsd/CecowskiAOKBCKP16 fatcat:bu4nbkqaejebjafrotibui6mkq

Software Defined Radio Architecture Survey for Cognitive Testbeds [article]

Mickaël Dardaillon , Kevin Marquet, Tanguy Risset, Antoine Scherrer (CITI Insa Lyon / Inria Grenoble Rhône-Alpes)
2013 arXiv   pre-print
This study should be useful for cognitive radio testbed designers who have to choose between many possible computing platforms.  ...  We also introduce a new cognitive radio testbed currently under construction and explain how this study have influenced the test-bed designers choices.  ...  It performs UMTS for a 640 kbps architectures, as described in subsection III-B, are used for bandwidth at 35 MHz, with a maximum of 300 MHz [15].  ... 
arXiv:1309.6466v1 fatcat:as5hmsdmujdpdnqzbw5mp6oakm

SMT-8036 Based Implementation of Secured Software Defined Radio System for Adaptive Modulation Technique [chapter]

Sudhanshu Mehta, Surbhi Sharma, Rajesh Khanna
2011 Communications in Computer and Information Science  
For future work, we plan to implement a more diverse set of MAC protocols to further evaluate our design and implement the architecture on different SDR platforms to evaluate its generality.  ...  If a radio needs a signal-processing block that isn't present then it can be written (often using an existing block as a starting point) and added to the framework.  ... 
doi:10.1007/978-3-642-22720-2_20 fatcat:efjaizgqdvdbhppaju5fqtltfi

A type system for the automatic distribution of higher-order synchronous dataflow programs

Gwenaël Delaval, Alain Girault, Marc Pouzet
2008 Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems - LCTES '08  
We address the design of distributed systems with synchronous dataflow programming languages.  ...  Our second contribution is to provide a type system, in order to infer the localization of non-annotated values by means of type inference and to ensure, at compilation time, the consistency of the distribution  ...  Let us study the case of a multichannel reception system that supports the two mobile standards GSM and UMTS: the former involves a filter for 1800 MHz frequencies, a GMSK demodulator, and a CRC / convolutional  ... 
doi:10.1145/1375657.1375672 dblp:conf/lctrts/DelavalGP08 fatcat:qly3lmfkhfda3ntfugjiahsrpi

On chip interconnects for multiprocessor turbo decoding architectures

M. Martina, G. Masera, H. Moussa, A. Baghdadi
2011 Microprocessors and microsystems  
Due to the dominant trend towards the design of flexible, multi-standard decoders, capable to support the decoding of several turbo codes, the network on chip approach is seen as a viable and promising  ...  The high throughput requirements of current and future standards impose that parallel decoders composed by multiple interconnected processing elements are used at the receiver side to efficiently decode  ...  In order to obtain the same level of flexibility in terms of inter-processor communication, a proper interconnect structure must be used.  ... 
doi:10.1016/j.micpro.2010.08.004 fatcat:tuifp42psfacln2bqzcl5jlnwa

A type system for the automatic distribution of higher-order synchronous dataflow programs

Gwenaël Delaval, Alain Girault, Marc Pouzet
2008 SIGPLAN notices  
We address the design of distributed systems with synchronous dataflow programming languages.  ...  Our second contribution is to provide a type system, in order to infer the localization of non-annotated values by means of type inference and to ensure, at compilation time, the consistency of the distribution  ...  Let us study the case of a multichannel reception system that supports the two mobile standards GSM and UMTS: the former involves a filter for 1800 MHz frequencies, a GMSK demodulator, and a CRC / convolutional  ... 
doi:10.1145/1379023.1375672 fatcat:5hmoxggvujbx3drhkie3zeztgu

Specifications and Modeling [chapter]

Peter Marwedel
2021 Embedded Systems  
AbstractHow can we describe the system which we would like to design, and how can we represent intermediate design information?  ...  The presentation includes models for early design phases, automata-based models, data flow, Petri nets, discrete event models, von Neumann languages, and abstraction levels for hardware modeling.  ...  The following is a list of frequently used names and attributes of levels: • System-level models: The term system level is not clearly defined.  ... 
doi:10.1007/978-3-030-60910-8_2 fatcat:gxmydpjzjvfk7ni2rj62j365zi
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