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Two-level mapping based cache index selection for packet forwarding engines
2006
Proceedings of the 15th international conference on Parallel architectures and compilation techniques - PACT '06
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We propose a novel two-level mapping framework that retains the hit-latency of one-level mapping yet incurs fewer conflict misses. ...
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. ...
The authors are thankful to the members of the High Performance Computing Laboratory for their useful comments and discussions. ...
doi:10.1145/1152154.1152188
dblp:conf/IEEEpact/RajanG06
fatcat:xecn5mw5r5ez5aloetkgbue5ey
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA
2008
2008 16th International Symposium on Field-Programmable Custom Computing Machines
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BiOLP, for tree-based search engines in IP routers. ...
It also maintains packet input order, and supports route updates without blocking subsequent incoming packets. ...
Most hardware-based solutions for high speed packet forwarding in routers fall into two main categories: ternary content addressable memory (TCAM)based and dynamic/static random access memory (DRAM/SRAM ...
doi:10.1109/fccm.2008.9
dblp:conf/fccm/LeJP08
fatcat:hecjejrsmrhbbidojjbapzxdtm
Bidirectional Pipelining for Scalable IP Lookup and Packet Classification
[article]
2011
arXiv
pre-print
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Our experiments show that, the architecture can achieve a perfectly balanced memory distribution over the pipeline stages, for both trie-based IP lookup and tree-based multi-dimensional packet classification ...
A search tree is partitioned, and then mapped onto pipeline stages by a bidirectional fine-grained mapping scheme. ...
[1] propose a Ring pipeline architecture for tree-based search engines. ...
arXiv:1107.5372v1
fatcat:xqnc4j5lcjbp5dww7csdpr6gqu
Multi-terabit ip lookup using parallel bidirectional pipelines
2008
Proceedings of the 2008 conference on Computing frontiers - CF '08
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This paper proposes an SRAM-based multi-pipeline architecture for multi-terabit rate IP lookup. ...
Also, IP caching is adopted to facilitate processing multiple packets per clock cycle. ...
Two methods are widely used in TCAM-based solutions to partition a routing table [23] : bit-selection and trie-based approaches. ...
doi:10.1145/1366230.1366273
dblp:conf/cf/JiangP08
fatcat:mo4msiwaxngw5bpo4gencrz734
A Novel Cache Architecture and Placement Framework for Packet Forwarding Engines
2009
IEEE transactions on computers
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We reduce conflict misses by introducing a novel two-level mapping based cache placement framework. ...
Hence, we propose a heterogeneously segmented cache architecture (HSCA) which uses separate caches for level-one and lower-level nodes each with carefully chosen sizes. ...
Our performance evaluation reveals that a bit selection based approach is also not very effective for packet forwarding.
IV. ...
doi:10.1109/tc.2009.18
fatcat:sf2ymhqdfzco5cxhrheqnrkd7a
A heterogeneously segmented cache architecture for a packet forwarding engine
2005
Proceedings of the 19th annual international conference on Supercomputing - ICS '05
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We further improve the hit rate of the level-one nodes cache by introducing a weight-based replacement policy and an intelligent index bit selection scheme. ...
Hence, we propose a heterogeneously segmented cache architecture (HSCA) which uses separate caches for level-one and lower-level nodes each with carefully chosen sizes. ...
The authors are thankful to the members of the High Performance Computing Laboratory for their useful comments and discussions. ...
doi:10.1145/1088149.1088159
dblp:conf/ics/RajanG05
fatcat:6pczdyvy4jdu5hr6aeuqjf6fbm
Parallel IP lookup using multiple SRAM-based pipelines
2008
Proceedings, International Parallel and Distributed Processing Symposium (IPDPS)
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A two-level mapping scheme is developed to balance the memory requirement among the pipelines as well as across the stages in a pipeline. ...
Third, the intra-flow packet order should be preserved. In this paper, we propose a parallel SRAM-based multi-pipeline architecture for IP lookup. ...
There are two methods to partition the routing table [24] : bit-selection and trie-based approaches. In the former, selected bits are used to index different TCAM blocks directly. ...
doi:10.1109/ipdps.2008.4536259
dblp:conf/ipps/JiangP08a
fatcat:gy6ay2vcunbffnh6ykkuplobqm
Improving performance in a combined router/server
2012
2012 IEEE 13th International Conference on High Performance Switching and Routing
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We also devise a strategy for how to efficiently map packet forwarding and application processing tasks onto the multi-core architecture. ...
We improve the overall performance by creating a fast path for packet forwarding through caching flow entries in on-board classification hardware on the NIC. ...
For instance, we can cache flows based on AS level or address blocks (for example /24 subnets) instead of individual source and destination IP addresses. ...
doi:10.1109/hpsr.2012.6260827
dblp:conf/hpsr/TanyingyongHS12
fatcat:cxvpslhiznbopadxf4o2zo46h4
Dynamic load balancing on Web-server systems
1999
IEEE Internet Computing
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This load-balancing technique lets users manually select alternative URLs for a Web site. ...
The client-based solution we discuss requires software modification on the client side; the other three (DNS-based, dispatcher-based, server-based) affect one or more components of the Web-server system ...
The first two authors are supported by the Italian Ministry of University and Scientific Research in the project framework of "Design Methodologies and Tools of High Performance Systems for Distributed ...
doi:10.1109/4236.769420
fatcat:kdzy7pg5kbeodlm6cprqa53zva
An Internet without the Internet protocol
2010
Computer Networks
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Internet routers are also experiencing alarming growth in their routing table sizes, which may soon make it impossible for them to forward packets quickly enough to meet demand. ...
The DNS infrastructure, which translates mnemonic host names into IP addresses understood by the routers, is frequently the target of cache poisoning attacks. ...
Finally, we would like to thank Rob Henderson for providing the DNS data used in our cache examination. ...
doi:10.1016/j.comnet.2010.06.009
fatcat:f4rdlkz7fvgx5fnxrdpl4yelfm
Small forwarding tables for fast routing lookups
1997
Computer communication review
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We present a forwarding table data structure designed for quick routing lookups. Forwarding tables are small enough to t in the cache of a conventional general purpose processor. ...
With the table in cache, a 200 MHz Pentium Pro or a 333 MHz Alpha 21164 can perform a few million lookups per second. ...
I n bound interfaces send packet headers to the forwarding engines through the switching fabric. The forwarding engines in turn determine which outgoing interface the packet should be sent to. ...
doi:10.1145/263109.263133
fatcat:nhoovnkxy5g4vjt55ortrptagi
Data delivery techniques in content centric routing for IoT: a systematic review
2018
International Journal of Advanced Technology and Engineering Exploration
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The basic flooding-based methods for data distribution in CCN can be introduced with some selection of the CCN forwarding decision process. There are two forwarding approaches blind and aware [7] . ...
Interface selection is based on the criteria in which forwarding CCN packets may use the data kept in PITs and FIBs for the selection of outgoing interface(s) at a single node. ...
doi:10.19101/ijatee.2018.547014
fatcat:imfftaa6ircm3ijzwbkxlcywya
Small forwarding tables for fast routing lookups
1997
Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication - SIGCOMM '97
Preserved Fulltext
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We present a forwarding table data structure designed for quick routing lookups. Forwarding tables are small enough to t in the cache of a conventional general purpose processor. ...
With the table in cache, a 200 MHz Pentium Pro or a 333 MHz Alpha 21164 can perform a few million lookups per second. ...
I n bound interfaces send packet headers to the forwarding engines through the switching fabric. The forwarding engines in turn determine which outgoing interface the packet should be sent to. ...
doi:10.1145/263105.263133
dblp:conf/sigcomm/DegermarkBCP97
fatcat:urjo54tr55dxhmrrke3e74p74m
Smart Name Lookup for NDN Forwarding Plane via Neural Networks
[article]
2021
arXiv
pre-print
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Note that this fulltext copy is not of the "primary" version of this work. The version it corresponds to is:
2021 pre-print arXiv:2105.05004v1 fatcat:j2fpuwsfgbfivdwj24htspmygeOther Versions
Focusing on this gap, a smart mapping model named Pyramid-NN via neural networks is proposed to build an index called LNI for NDN forwarding plane. ...
Experimental results show that LNI-based FIB can reduce the memory consumption to 58.258 MB for 2 million names. ...
Moreover, the proper hyperparameters of it are selected by simulations and analysis. 2) Based on Pyramid-NN, an index called Learning Name Index (LNI) for NDN forwarding plane is proposed to support the ...
arXiv:2105.05004v2
fatcat:rhb3nqia4bfsvolayv7spauoca
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines
2009
Journal of Parallel and Distributed Computing
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A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2010; you can also visit the original URL.
The file type is application/pdf.
A two-level mapping scheme is developed to balance the memory requirement among the pipelines as well as across the stages in each pipeline. ...
Third, the intra-flow packet order (i.e. the sequence) must be preserved. In this paper, we propose a parallel SRAM-based multi-pipeline architecture for IP lookup. ...
There are two methods to partition the routing table [28] : bitselection and trie-based approaches. In the former, selected bits are used to index different TCAM blocks directly. ...
doi:10.1016/j.jpdc.2009.04.001
fatcat:h7daurpdhvay7mydapc3v7weyi
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