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Tuning SAT Checkers for Bounded Model Checking [chapter]

Ofer Shtrichman
2000 Lecture Notes in Computer Science  
Bounded Model Checking based on SAT methods has recently been introduced as a complementary technique to BDD-based Symbolic Model Checking.  ...  We show that the unique characteristics of BMC formulas can be exploited for a variety of optimizations in the SAT checking procedure.  ...  Acknowledgments I would like to thank Armin Biere and Joao Marques-Silva for making BMC and Grasp publicly available, respectively, and for their most helpful assistance in figuring them out.  ... 
doi:10.1007/10722167_36 fatcat:7aliaski5jatjcnp556nfex6z4

Benefits of Bounded Model Checking at an Industrial Setting [chapter]

Fady Copty, Limor Fix, Ranan Fraer, Enrico Giunchiglia, Gila Kamhi, Armando Tacchella, Moshe Y. Vardi
2001 Lecture Notes in Computer Science  
The usefulness of Bounded Model Checking (BMC) based on propositional satisfiability (SAT) methods for bug hunting has already been proven in several recent work.  ...  In Forecast, we present several alternatives for adapting BDD-based model checking for BMC.  ...  Acknowledgements We would like to thank Roy Armoni for his contribution to the development of the infrastructure of Thunder.  ... 
doi:10.1007/3-540-44585-4_43 fatcat:bhdmgblwgrbmppnegl5cckvqxu

Bounded Model Checking [chapter]

Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Ofer Strichman, Yunshan Zhu
2003 Advances in Computers  
In this article we survey a technique called Bounded Model Checking (BMC), which uses a propositional SAT solver rather than BDD manipulation techniques.  ...  Symbolic model checking with Binary Decision Diagrams (BDDs) has been successfully used in the last decade for formally verifying finite state systems such as sequential circuits and protocols.  ...  The basis for this reduction lies in the following two lemmas. Reducing bounded model checking to SAT In the previous section we defined the semantics for bounded model checking.  ... 
doi:10.1016/s0065-2458(03)58003-2 fatcat:otxt677tmfgnnad46zu5q6hop4

Wolf – Bug Hunter for Concurrent Software Using Formal Methods [chapter]

Sharon Barner, Ziv Glazberg, Ishai Rabinovitz
2005 Lecture Notes in Computer Science  
Wolf is a "push-button" model checker for concurrent C programs developed in IBM Haifa. It automatically generates both the model and the specification directly from the C code.  ...  According to our experiments, these methods complement explicit exploration methods of software model checking.  ...  In addition, we are interested in introducing other model checking algorithms to the Wolf platform such as explicit and SAT-based model checking.  ... 
doi:10.1007/11513988_16 fatcat:r526i3bzxzcj5kkpgqbr3v7um4

Hardware Model Checking Competition 2014: An Analysis and Comparison of Model Checkers and Benchmarks

Gianpiero Cabodi, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Danilo Vendraminetto, Armin Biere, Keijo Heljanko
2016 Journal on Satisfiability, Boolean Modeling and Computation  
Model checkers and sequential equivalence checkers have become essential tools for the semiconductor industry in recent years.  ...  research to advance the state-of-the-art in model checkers for these verification problems.  ...  Moreover, the authors express their appreciation to Vigyan Singhal, from Oski Technologies, for his analysis of the Oski benchmarks.  ... 
doi:10.3233/sat190106 fatcat:3c6d7pvofjhlbkiboegplyj52m

Boosting Verification by Automatic Tuning of Decision Procedures

Frank Hutter, Domagoj Babic, Holger H. Hoos, Alan J. Hu
2007 Formal Methods in Computer Aided Design (FMCAD'07)  
In this paper, we study how such an AI approach can improve a state-of-theart SAT solver for large, real-world bounded model-checking and software verification instances.  ...  The resulting, automaticallyderived parameter settings yielded runtimes on average 4.5 times faster on bounded model checking instances and 500 times faster on software verification problems than extensive  ...  V: bounded model checking (BMC) and software verification (SWV).  ... 
doi:10.1109/fmcad.2007.4401979 fatcat:aiynw35bivaqnkzqei7psjw2v4

Boosting Verification by Automatic Tuning of Decision Procedures

Frank Hutter, Domagoj Babic, Holger H. Hoos, Alan J. Hu
2007 Formal Methods in Computer Aided Design (FMCAD'07)  
In this paper, we study how such an AI approach can improve a state-of-theart SAT solver for large, real-world bounded model-checking and software verification instances.  ...  The resulting, automaticallyderived parameter settings yielded runtimes on average 4.5 times faster on bounded model checking instances and 500 times faster on software verification problems than extensive  ...  V: bounded model checking (BMC) and software verification (SWV).  ... 
doi:10.1109/famcad.2007.9 dblp:conf/fmcad/HutterBHH07 fatcat:s6pm7bzqnjcwzjbikaw3yweohu

Equivalence Checking Using Trace Partitioning

Rajdeep Mukherjee, Daniel Kroening, Tom Melham, Mandayam Srivas
2015 2015 IEEE Computer Society Annual Symposium on VLSI  
The partitioning is performed in tandem in both models, exploiting the structure present in the high-level model. The approach generates many but tractable SAT/SMT queries.  ...  We present experimental data quantifying the benefit of our partitioning method for both combinational and sequential equivalence checking of difficult arithmetic circuits and control-intensive circuits  ...  Bounded model checking (BMC) using propositional SAT or satisfiability modulo theories (SMT) can be easily applied to both RTL and C-style languages [4] , [5] .  ... 
doi:10.1109/isvlsi.2015.110 dblp:conf/isvlsi/MukherjeeKMS15 fatcat:vexrgnkqsvg7fpj47nomdbvgom

Bounded Model Checking of Compositional Processes

Jun Sun, Yang Liu, Jin Song Dong, Jing Sun
2008 2008 2nd IFIP/IEEE International Symposium on Theoretical Aspects of Software Engineering  
This paper presents a compositional encoding of hierarchical processes as SAT problems and then applies state-of-theart SAT solvers for bounded model checking.  ...  Verification techniques like SAT-based bounded model checking have been successfully applied to a variety of system models.  ...  Our bounded model checker (referred as PAT-SAT) outperforms Spin for 13 or more philosophers.  ... 
doi:10.1109/tase.2008.12 dblp:conf/tase/SunLDS08 fatcat:imruubkrmbchzntshmc35ynory

Formal Methods for Functional Verification [chapter]

Randal E. Bryant, James H. Kukula
2003 The Best of ICCAD  
One important application of SAT checkers has been to a limited form of model checking, known as a bounded model checker [6] .  ...  GRASP [49] introduced a new generation of SAT solvers that were designed and tuned using EDA benchmarks.  ... 
doi:10.1007/978-1-4615-0292-0_1 fatcat:t776pq6t7reyffs327dkmonjse

Efficient SAT-based bounded model checking for software verification

Franjo Ivančić, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Pranav Ashar
2008 Theoretical Computer Science  
Bounded model checking SAT-based model checking a b s t r a c t This paper discusses our methodology for formal analysis and automatic verification of software programs.  ...  This allows us to take advantage of SAT-based learning inherent to the best performing bounded model checkers. (2) Various heuristics customized for models automatically generated from software, allowing  ...  Acknowledgements We thank Srihari Cadambi, Himanshu Jain, Vineet Kahlon, Weihong Li, Nadia Papakonstantinou, Sriram Sankaranarayanan, Ilya Shlyakhter, Chao Wang and Aleksandr Zaks for their help in the  ... 
doi:10.1016/j.tcs.2008.03.013 fatcat:zy3qcqgzvnh43kgu7isloa7fcm

On Incremental Satisfiability and Bounded Model Checking

Siert Wieringa
2011 Formal Methods in Computer-Aided Design  
Bounded Model Checking (BMC) is a symbolic model checking technique in which the existence of a counterexample of a bounded length is represented by the satisfiability of a propositional logic formula.  ...  This observation has not been previously presented and is particularly useful for designing solving strategies for parallelized model checkers.  ...  It is also easy to envision how these techniques could be useful for model checkers that use a combination of truly different model checking techniques such as PdTrav [5] .  ... 
dblp:conf/fmcad/Wieringa11 fatcat:36l2tjlxpjdyljb6ny4w5dewku

Abstraction-Guided Model Checking Using Symbolic IDA* and Heuristic Synthesis [chapter]

Kairong Qian, Albert Nymeyer, Steven Susanto
2005 Lecture Notes in Computer Science  
As in bounded model checking, the algorithm uses an iterative deepening search strategy.  ...  A heuristic-based symbolic model checking algorithm, BDD-IDA * that efficiently falsifies invariant properties of a system is presented.  ...  We would like to thank all anonymous referees for their corrections and suggestions.  ... 
doi:10.1007/11562436_21 fatcat:o6f2ab6zhjgsbeqsnp3bornm2a

ARTIFACT TACAS22

Kheireddine Anissa
2021 Zenodo  
Bounded model checking (Section 3).  ...  On the other hand, symbolic model checking represents states implicitly using Boolean functions (BDD [5] , SAT-based Bounded model-checking [3] ).  ... 
doi:10.5281/zenodo.5645550 fatcat:2p74tj27fzcwzhrqarfbgb6zju

A survey of recent advances in SAT-based formal verification

Mukul R. Prasad, Armin Biere, Aarti Gupta
2005 International Journal on Software Tools for Technology Transfer (STTT)  
This paper presents a survey of the latest developments in SAT-based formal verification, including incomplete methods such as bounded model checking, and complete methods for model checking.  ...  Dramatic improvements in SAT solver technology over the last decade, and the growing need for more efficient and scalable verification solutions have fueled research in verification methods based on SAT  ...  Model Checking With the introduction of bounded model checking [15] it became clear that SAT can be used for model checking [27] .  ... 
doi:10.1007/s10009-004-0183-4 fatcat:d6hub3n6uzezhkl7dnneh2glgu
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