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Transparent code authentication at the processor level

A.O. Durahim, E. Savaş, B. Sunar, T.B. Pedersen, Ö. Kocabaş
2009 IET Computers & Digital Techniques  
We present a lightweight authentication mechanism which verifies the authenticity of code and thereby addresses the virus and malicious code problems at the hardware level eliminating the need for trusted  ...  The technique we propose tightly integrates the authentication mechanism into the processor core.  ...  Acknowledgement The authors would like to thank the anonymous referees for their helpful comments.  ... 
doi:10.1049/iet-cdt.2007.0122 fatcat:yzgxjqyqwvbr7lcs7o3fbsxvpm

Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system

David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede
2003 Proceedings of the 40th conference on Design automation - DAC '03  
It presents the concept of HW/SW acceleration transparency, a systematic method to accelerate Java functions in both software and hardware.  ...  An example of acceleration transparency for a Rijndael encryption function is presented. The embedded prototype hardware platform is also described.  ...  The authors would like to thank the anonymous referees for their comments.  ... 
doi:10.1145/775832.775850 dblp:conf/dac/HwangLSSFYHV03 fatcat:hwtvgrcx2begfj6vqsskupcvgq

Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system

David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede
2003 Proceedings of the 40th conference on Design automation - DAC '03  
It presents the concept of HW/SW acceleration transparency, a systematic method to accelerate Java functions in both software and hardware.  ...  An example of acceleration transparency for a Rijndael encryption function is presented. The embedded prototype hardware platform is also described.  ...  The authors would like to thank the anonymous referees for their comments.  ... 
doi:10.1145/775848.775850 fatcat:xyqrutaq2vfjxj6tinsexwqzli

Continuous Remote Mobile Identity Management Using Biometric Integrated Touch-Display

Tao Feng, Ziyi Liu, Bogdan Carbunar, Dainis Boumber, Weidong Shi
2012 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops  
Our solution differs from the previous onetime and enforced authentication approaches through two novel features: (i) user transparent authentication process, requiring neither password nor extra login  ...  In this paper, we leverage a unified structure, consisting of transparent TFTbased fingerprint sensors, touchscreen, and display, to propose a novel identity management mechanism that authenticates users  ...  The touchscreen is at the bottom level and TFT fingerprint sensors are overlaid on the top level by using transparent TFTs [15] , (thus look transparent to the user).  ... 
doi:10.1109/microw.2012.9 dblp:conf/micro/FengLCBS12 fatcat:xoskyfg5xjd7ffvqdreuulv4be

Towards the Hypervision of Hardware-based Control Flow Integrity for Arm Platforms

Giulia Ferri, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
2019 Italian Conference on Cybersecurity  
This paper focuses on the hardware-based CFI solution offered by latest Arm platforms, namely Pointer Authentication Code (PAC), and investigates on the possible approaches to integrate said technique  ...  extensions of the processor) is needed to properly virtualize PAC-enabled software and to implement recovery strategies in the presence of attacks.  ...  at the Exception Level that caused the trap exception.  ... 
dblp:conf/itasec/FerriCBB19 fatcat:v2xp3iyzobeexlpq2svggj7pwu

Enhancing security in the memory management unit

T. Gilmont, J.-D. Legat, J.-J. Quisquater
1999 Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium  
We propose an hardware solution to several security problems that are difficult to solve on classical processor architectures, like licensing, electronic commerce, or software privacy.  ...  The memory management unit which provides multitasking and v irtual memory support is extended and given a third purpose: to supply strong hardware security support for the software layer.  ...  when the processor is executing ciphered code.  ... 
doi:10.1109/eurmic.1999.794507 dblp:conf/euromicro/GilmontLQ99 fatcat:7dn63ejpezgxlo5qaagsxsvj5y

An overview of security issues in cluster interconnects

Manhee Lee, Eun Jung Kim, Ki Hwan Yum, M. Yousif
2006 Sixth IEEE International Symposium on Cluster Computing and the Grid (CCGRID'06)  
A major inefficiency in utilizing such interconnects has been the send/receive communication overheads at the sender/receiver hosts.  ...  We then compare these schemes in terms of host processor offload, end-to-end latency, security transparency and cryptographic processing performance.  ...  high-throughput deep pipelines and code optimization, the host processor can do security processing as the secure coprocessor does.  ... 
doi:10.1109/ccgrid.2006.1630920 fatcat:iyybq4xx6vhrbnpnyit5w3lgmu

Exposing vulnerabilities of untrusted computing platforms

Yier Jin, Michail Maniatakos, Yiorgos Makris
2012 2012 IEEE 30th International Conference on Computer Design (ICCD)  
As part of our entry in the Cyber Security Awareness Week (CSAW) Embedded System Challenge hosted by NYU-Poly in 2011, we developed and presented 10 such processor-level hardware Trojans.  ...  5 encryption algorithm checking of a medium complexity micro-processor (8051).  ...  The FPGA platforms for the contest were donated by Xilinx.  ... 
doi:10.1109/iccd.2012.6378629 dblp:conf/iccd/JinMM12 fatcat:qlvdrencavhdfog5s2k3tbv34m

A Client-Transparent Approach to Defend Against Denial of Service Attacks

Mudhakar Srivatsa, Arun Iyengar, Jian Yin, Ling Liu
2006 Symposium on Reliable Distributed Systems. Proceedings  
(ii) Although we operate using the client-side browser (HTTP layer), our technique enables fast IP level packet filtering at the server's firewall and requires no changes to the application(s) hosted by  ...  Client authentication using techniques like IPSec or SSL may often require changes to the client-side software and may additionally require superuser privileges at the client for deployment.  ...  HTTP level operation at the client permits our implementation to be client transparent, while IP level operation at the server allows packets to be filtered at the server's firewall.  ... 
doi:10.1109/srds.2006.6 dblp:conf/srds/SrivatsaIYL06 fatcat:op5klxga6rddxi2igxtox4kp64

Study of a new link layer security scheme in a wireless sensor network [article]

Nasrin Sultana, Tanvir Ahmed, A. B. M. Siddique Hossain
2012 arXiv   pre-print
Third, the most critical security issue is protecting the aggregate output of the system, even if individual nodes may be compromised.  ...  In this paper we have proposed a new technique to provide data authentication and privacy in faster, scalable and cost effective way.  ...  For example, the processor used, MSP430F149 draws a nominal current of 420μA at 3V and at a clock frequency of 1MHz in active mode -this means that the energy per instruction cycle (for the processor alone  ... 
arXiv:1209.5428v1 fatcat:nknkvgtixnauxidpi2x5dt6fry

Xeon Phi System Software [chapter]

Rezaur Rahman
2013 Intel® Xeon Phi™ Coprocessor Architecture and Tools  
Because the coprocessor core is based on the traditional Intel P5 processor core, it can execute a complete operating system like any other computer.  ...  This design choice allows the coprocessor to appear as a node to the rest of the system and allows a usage model common in the HPC programming environment.  ...  code in the fboot0 authentication code sequence.  ... 
doi:10.1007/978-1-4302-5927-5_7 fatcat:qd7qjsiegng4zk62b4tqh2j52m

VulCAN

Jo Van Bulck, Jan Tobias Mühlberg, Frank Piessens
2017 Proceedings of the 33rd Annual Computer Security Applications Conference on - ACSAC 2017  
Vehicular communication networks have been subject to a growing number of attacks that put the safety of passengers at risk.  ...  Specifically, we advance the state-of-the-art by not only protecting against network attackers, but also against substantially stronger adversaries capable of arbitrary code execution on participating  ...  This research is partially funded by the Research Fund KU Leuven. Jo Van Bulck is supported by a doctoral grant of the Research Foundation -Flanders (FWO).  ... 
doi:10.1145/3134600.3134623 dblp:conf/acsac/BulckMP17 fatcat:uskdrzopyrg2bkphxc7rwj2day

A Grid Portal for an Undergraduate Parallel Programming Course

J. Tourino, M.J. Martin, J. Tarrio, M. Arenaz
2005 IEEE Transactions on Education  
As these facilities are heterogeneous, are located at different sites, and belong to different institutions, grid computing technologies have been used to overcome these issues.  ...  This paper describes an experience of designing and implementing a portal to support transparent remote access to supercomputing facilities to students enrolled in an undergraduate parallel programming  ...  ), and by the CrossGrid European Project (IST-2001-32243).  ... 
doi:10.1109/te.2004.842888 fatcat:chullxkdwvblzh665hahkqqrum

Sanctorum: A lightweight security monitor for secure enclaves [article]

Ilia Lebedev and Kyle Hogan and Jules Drean and David Kohlbrenner and Dayeol Lee and Krste Asanović and Dawn Song and Srinivas Devadas
2018 arXiv   pre-print
While the threat models employed by various enclave systems differ, the high-level guarantees they offer are essentially the same: attestation of an enclave's initial state, as well as a guarantee of enclave  ...  Sanctorum's threat model is informed by the threat model of the isolation primitive, and is suitable for adding enclaves to a variety of processor systems.  ...  Excluding these, the non platform-specific SM code weighs in at 1011 LOC of C99. B.  ... 
arXiv:1812.10605v1 fatcat:q7hm4ps6jzbnlgbhcg27qho7cq

Sanctorum: A lightweight security monitor for secure enclaves

Ilia Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)  
While the threat models employed by various enclave systems differ, the high-level guarantees they offer are essentially the same: attestation of an enclave's initial state, as well as a guarantee of enclave  ...  Sanctorum's threat model is informed by the threat model of the isolation primitive, and is suitable for adding enclaves to a variety of processor systems.  ...  Excluding these, the non platform-specific SM code weighs in at 1011 LOC of C99. B.  ... 
doi:10.23919/date.2019.8715182 dblp:conf/date/LebedevHDKLASD19 fatcat:wsxi4ygoargzxheznlkspzj3ja
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