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Trace cache redundancy: red and blue traces

A. Ramirez, J.Ll. Larriba-Pey, M. Valero
Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550)  
We propose selective trace storage to avoid trace redundancy between the trace cache and the instruction cache.  ...  As we show, the trace cache mechanism is generating a high degree of redundancy between the traces stored in the trace cache and those built by the compiler, already present in the instruction cache.  ...  These blue traces are being stored in both the instruction cache and the trace cache, creating an unnecessary degree of redundancy.  ... 
doi:10.1109/hpca.2000.824361 dblp:conf/hpca/RamirezLV00 fatcat:3rsuy6qfhjh4jnj4sjtqdlbscy

Decoupling IPv7 from Multi-Processors in Redundancy

2019 International Journal of Engineering and Advanced Technology  
Published By: Blue Eyes Intelligence Engineering & Sciences Publication Retrieval Number: F11960886S219/2019©BEIESP DOI:10.35940/ijeat.F1196.0886S219 hurt.  ...  Therefore, we present an analysis of DHCP (RopyRongeur),verifying that cache coherence and journaling file systems are regularly in compatible. The contributions of this work areas follows.  ... 
doi:10.35940/ijeat.f1196.0886s219 fatcat:kocpirx2fvf7nd42xefznrgcfu

Efficient detection of large-scale redundancy in enterprise file systems

George Forman, Kave Eshghi, Jaap Suermondt
2009 ACM SIGOPS Operating Systems Review  
Each blue dot indicates a pair of similar directories.  ...  An additional red curve gives a rough estimate of the cumulative savings if all such pairs were eliminated at each level of similarity.  ... 
doi:10.1145/1496909.1496926 fatcat:zyds376dbndfvp2o3ptvbcjm4u

Instruction fetch architectures and code layout optimizations

A. Ramirez, J.L. Larriba-Pey, M. Valero
2001 Proceedings of the IEEE  
instruction every few cycles, to fetching one instruction per cycle, to fetching a full basic block per cycle, to several basic blocks per cycle: the evolution of the mechanism surrounding the instruction cache  ...  Traces containing zero breaks are considered blue (redundant) traces, because they can be fetched by the core fetch unit in a single cycle, without need of the trace cache.  ...  Trace Cache Redundancy As described in Section V, the trace cache is a redundant storage mechanism.  ... 
doi:10.1109/5.964440 fatcat:yp3a5e42wbfjtfkqsyfr5dkrcq

Chunk and object level deduplication for web optimization: A hybrid approach

Ioannis Papapanagiotou, Robert D. Callaway, Michael Devetsikiotis
2012 2012 IEEE International Conference on Communications (ICC)  
Proxy caches or Redundancy Elimination (RE) systems have been used to remove redundant bytes in WAN links. However, they come with some inherited deficiencies.  ...  We evaluate the proposed system by performing a trace driven emulation. Our results indicate that a hybrid system is able to provide better savings than a proxy cache, or a standalone RE system.  ...  (B) They present the difference in the savings between a proxy cache standalone system and a hybrid system (red and blue line).  ... 
doi:10.1109/icc.2012.6363843 dblp:conf/icc/PapapanagiotouCD12 fatcat:yx7gg2f7orevjixsysjx7jfanu

Interactive Visualization for Memory Reference Traces

A. N. M. Imroz Choudhury, Kristin C. Potter, Steven G. Parker
2008 Computer graphics forum (Print)  
We present the Memory Trace Visualizer (MTV), a tool that provides interactive visualization and analysis of the sequence of memory operations performed by a program as it runs.  ...  Using visual representations of abstract data structures, a simulated cache, and animating memory operations, MTV can expose memory performance bottlenecks and guide programmers toward memory system optimization  ...  The cache hit/miss status is indicated in the bottom portion of the memory blocks by a color ranging from blue to red-blue for a hit to L1, red for a cache miss to main memory, and a blend between blue  ... 
doi:10.1111/j.1467-8659.2008.01212.x fatcat:cpcn2yqup5evxeclnj7lvbtqt4


Sean M. Snyder, Shimin Chen, Panos K. Chrysanthis, Alexandros Labrinidis
2011 Proceedings of the Seventh International Workshop on Data Management on New Hardware - DaMoN '11  
(Red/blue/green: address range for hot data; gray: address range for cold data) by monitoring the I/O activities. (The implementation will be described in Section 4.)  ...  EERAID [11] and RIMAC [24] exploited redundancy in RAID arrays for saving energy. They focused on request scheduling and storage cache designs.  ... 
doi:10.1145/1995441.1995447 dblp:conf/damon/SnyderCCL11 fatcat:bxrtiohkyfajzhpzcjcv67c3y4

Conceptual Investigation Process Model for Managing Database Forensic Investigation Knowledge

Aarafat Aldhaqm, Shukor Abd Razak, Siti Hajar Othman, Abdulalem Ali, Asri Ngadi
2016 Research Journal of Applied Sciences Engineering and Technology  
In case of tampering happened, then series of database forensic analyses algorithms like Monochromatic algorithm, Red Green Blue algorithm (RGB) (Pavlou and Snodgrass, 2008) , Red Green Blue Yellow algorithm  ...  , green and blue.  ... 
doi:10.19026/rjaset.12.2377 fatcat:i6hgcdkievbm7pqvvg3r2usv34

A resource from 3D electron microscopy of hippocampal neuropil for user training and tool development

Kristen M. Harris, Josef Spacek, Maria Elizabeth Bell, Patrick H. Parker, Laurence F. Lindsey, Alexander D. Baden, Joshua T. Vogelstein, Randal Burns
2015 Scientific Data  
The original images, traces, and Reconstruct software and files are freely available and visualized at the Open Connectome Project (Data Citation 1).  ...  Acknowledgements We thank Robert Smith and Libby Perry for technical assistance in cutting and imaging two of the series, and Jeremy Smalley for assisting with some of the initial manual tracings and some  ...  This avoids redundant I/O and computation; data are read once and rendered once. The disk cache is deployed independently from the volume databases.  ... 
doi:10.1038/sdata.2015.46 pmid:26347348 pmcid:PMC4555877 fatcat:4phtsfyen5dzrdjesiqko3rgpi

Just-in-time Length Specialization of Dynamic Vector Code

Justin Talbot, Zachary DeVito, Pat Hanrahan
2014 Proceedings of ACM SIGPLAN International Workshop on Libraries, Languages, and Compilers for Array Programming - ARRAY'14  
Effect of our register allocation pass (without-blue, with-red).  ...  Figure 5 . 5 Throughput of our runtime (red), optimized & autovectorized C (blue), and the open source implementation of R (green) as a function of the vector length (on log-log scale).  ... 
doi:10.1145/2627373.2627377 dblp:conf/pldi/TalbotDH14 fatcat:4dptcjw7djhadlilnxc3mo3hnm

Static Probabilistic Timing Analysis for Multi-path Programs

Benjamin Lesage, David Griffin, Sebastian Altmeyer, Robert I. Davis
2015 2015 IEEE Real-Time Systems Symposium  
The evaluation results show incomparability with analysis for an equivalent deterministic system using an LRU cache.  ...  The analysis estimates the temporal contribution of an evict-on-miss, random replacement cache to the probabilistic Worst-Case Execution Time (pWCET) distribution of multi-path programs.  ...  They present the analyses results for R = 8 focused blocks using a single or multiple segments (blue squares and red hollow triangles respectively).  ... 
doi:10.1109/rtss.2015.41 dblp:conf/rtss/LesageGAD15 fatcat:pmphpt5fvngp7mik7l6cs7jubm

Hardware performance counters for system reliability monitoring

Elena Woo Lai Leng, Mark Zwolinski, Basel Halak
2017 2017 IEEE 2nd International Verification and Security Workshop (IVSW)  
The blue lines indicates that the tasks belong to the user, the red lines indicate the responsibility of GemFI, and the orange line denotes the HPC values as outputs from the OS.Each experiment is executed  ...  Dual modular redundancy, triple modular redundancy and N-modular redundancy are some of the wellknown hardware redundancy techniques studied and applied but they have high overheads.  ... 
doi:10.1109/ivsw.2017.8031548 dblp:conf/ivsw/LengZH17 fatcat:xadhlfsr2vcdrbegwlcz5rtlzy

Vulnerability Assessment of the Rowhammer Attack Using Machine Learning and the gem5 Simulator - Work in Progress

Loïc France, Maria Mushtaq, Florent Bruguier, David Novo, Pascal Benoit
2021 Proceedings of the 2021 ACM Workshop on Secure and Trustworthy Cyber-Physical Systems  
In this paper, we propose a tool to build a system-specific detection mechanism using gem5 to simulate the system and Machine Learning to detect the attack by analyzing hardware event traces.  ...  As all LLC misses lead to DRAM row hit or row miss, monitoring LLC misses is redundant. The first level cache is separated into an instruction cache (L1-I) and a data cache (L1-D).  ...  Red: an attack process is running; Blue: no attack process is running Figure 4 : 4 10 µs samples evolution over time (in seconds) for custom program in parallel to STREAM benchmark. .add(Dense(100,  ... 
doi:10.1145/3445969.3450425 fatcat:7i55ss7tmvb4jfxw77aw5tfbqq

On the analysis of random replacement caches using static probabilistic timing methods for multi-path programs

Benjamin Lesage, David Griffin, Sebastian Altmeyer, Liliana Cucu-Grosjean, Robert I. Davis
2017 Real-time systems  
The analysis estimates the temporal contribution of an evict-on-miss, random replacement cache to the pWCET distribution of multi-path programs.  ...  The analysis uses a conservative join function that provides a proper over-approximation of the possible cache contents and the pWCET B Benjamin Lesage  ...  The contention and path merging approaches are identified by red circles and blue crosses respectively.  ... 
doi:10.1007/s11241-017-9295-2 fatcat:3whchd6f5jdifafgb3ljm4ysru

Autonomous Lighting Agents in Photon Mapping [chapter]

A. Herubel, V. Biri, S. Deverly
2009 Lecture Notes in Computer Science  
In computer graphics, global illumination algorithms such as photon mapping require to gather large volumes of data which can be heavily redundant.  ...  This is explained by the local redundancy of the irradiance data. Our structure show a considerably better density, as the number of sensors perfectly fits with the redundancy of data.  ...  Data is gathered in large volumes although due to heavy redundancy we observe a low density of useful data (see Fig 1.B and C) .  ... 
doi:10.1007/978-3-642-10520-3_88 fatcat:3bfswsut4naanj6x7ve5755ufy
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