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Tools for validating asynchronous digital circuits

A. Ashkinazy, D. Edwards, C. Farnsworth, G. Gendel, S. Sikand
<i title="IEEE Comput. Soc. Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/plplx3jwbjc33clwi4oo4fxbsq" style="color: black;">Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems</a> </i> &nbsp;
It also describes XPOWER, an analysis and visualization tool for dynamic power consumption.  ...  Traditional tools, oriented toward synchronous designs, may miss critical asynchronous design problems.  ...  Conclusions This paper has described several tools that have proven to be very effective for debugging, modeling, and analyzing the operation of asynchronous designs.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.1994.656282">doi:10.1109/async.1994.656282</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/async/AshkinazyEFGS94.html">dblp:conf/async/AshkinazyEFGS94</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/gangow4qnvfondsy2ha6zvgeqm">fatcat:gangow4qnvfondsy2ha6zvgeqm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170812133826/http://www.genashor.com/genashor/repos/Async94.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/41/78/4178ce8342770ecb6a6c642d4e9cb7c558d7e043.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.1994.656282"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Automated synthesis of asynchronous event-based interfaces for neuromorphic systems

Hesham Mostafa, Federico Corradi, Marc Osswald, Giacomo Indiveri
<span title="">2013</span> <i title="IEEE"> 2013 European Conference on Circuit Theory and Design (ECCTD) </i> &nbsp;
We present an automated design approach that leverages the commonly available digital design tools in order to rapidly synthesize asynchronous event-based interface circuits from behavioral VHDL code.  ...  We validated the proposed design method by synthesizing asynchronous interface circuits for a neuromorphic multi-neuron architecture, and fabricating the VLSI device.  ...  These asynchronous digital circuits change the state [7] , there is still no mature and readily available digital design flow for the development and automated design of asynchronous circuits.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ecctd.2013.6662213">doi:10.1109/ecctd.2013.6662213</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/63pqo2b3bnezdis2mdg2temita">fatcat:63pqo2b3bnezdis2mdg2temita</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808202047/http://ncs.ethz.ch/pubs/pdf/Mostafa_etal13.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/dc/8b/dc8bbcbd3279824291dcde121b602e44096613e5.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ecctd.2013.6662213"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems

Vladimir Dubikhin, Chris Myers, Danil Sokolov, Ioannis Syranidis, Alex Yakovlev
<span title="">2017</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5vn6yyeefbbxtoo3uhwxwjwtme" style="color: black;">Proceedings of the 54th Annual Design Automation Conference 2017 on - DAC &#39;17</a> </i> &nbsp;
In particular, the emergence of "little digital" electronics inside or near analog circuitry calls for the increasing use of asynchronous logic.  ...  Analog and digital parts are closely intermixed, hence demanding AMS design methods and tools to be more holistic.  ...  Acknowledgments This research was supported by EPSRC grant "A4A: Asynchronous design for Analogue electronics" (EP/L025507/1) and National Science Foundation Grant No. CCF-1117515.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3061639.3072945">doi:10.1145/3061639.3072945</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/dac/DubikhinMSSY17.html">dblp:conf/dac/DubikhinMSSY17</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ujblxhmtvvdsnd3n77lvvriwr4">fatcat:ujblxhmtvvdsnd3n77lvvriwr4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200310111944/https://eprint.ncl.ac.uk/file_store/production/240135/C2A9BDB6-B90D-431F-BF1D-542278DE0092.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/14/de/14de34d1f3015294187c0d269bc70ea918ad3787.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3061639.3072945"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Elastic Bundles: Modelling and Synthesis of Asynchronous Circuits with Granular Rigidity

Johnson Fernandes, Danil Sokolov, Alex Yakovlev
<span title="">2017</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/plplx3jwbjc33clwi4oo4fxbsq" style="color: black;">2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)</a> </i> &nbsp;
Elastic circuit design is a revolutionary step in VLSI design paving the way for commercial adoption of asynchronous design techniques.  ...  The resulting model is then partitioned into functional blocks of fine-grained and coarse-grained asynchronous elements that would finally be transformed to equivalent circuit descriptions for system logic  ...  This research was supported by EPSRC grant EP/I038551/1 Globally Asynchronous Elastic Logic Synthesis (GAELS).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.2017.14">doi:10.1109/async.2017.14</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/async/FernandesSY17.html">dblp:conf/async/FernandesSY17</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/7oieqxis6vcoda7debggtsulue">fatcat:7oieqxis6vcoda7debggtsulue</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200310094114/https://eprint.ncl.ac.uk/file_store/production/243609/A88CA7EF-6281-44A3-A417-A8F4B3ADD2F8.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/4d/01/4d0122b5cb97b5bb2ed67643b23008e62ad12249.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.2017.14"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

High-level fault simulation methodology for QDI template-based asynchronous circuits

Behnam Ghavami, Alireza Tajary, Hamid-Reza Zarandi
<span title="">2009</span> <i title="IEEE"> TENCON 2009 - 2009 IEEE Region 10 Conference </i> &nbsp;
Complexity of design and the lack of suitable test methodology are the major obstacles for widespread use of asynchronous circuit in digital circuit design.  ...  However, test frameworks such as fault simulator for synchronous circuits are not applicable for template based asynchronous circuits.  ...  Persia is a synthesis tool for QDI asynchronous circuit [4] [5].  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tencon.2009.5395804">doi:10.1109/tencon.2009.5395804</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/nji65jzatvgmvinpkhu2gv6bn4">fatcat:nji65jzatvgmvinpkhu2gv6bn4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809092748/http://ceit.aut.ac.ir/~pedram/newfiles/19.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/dc/80/dc80894df3d1c975d69610d096242599e97fa4a4.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tencon.2009.5395804"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Robust and Energy-Efficient Hardware: The Case for Asynchronous Design

Ney Laert Vilar Calazans, Taciano Ares Rodolfo, Marcos L. L. Sartori
<span title="2021-08-19">2021</span> <i title="Journal of Integrated Circuits and Systems"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/jsqdmp6uz5ephoqg2attrgm3xi" style="color: black;">Journal of Integrated Circuits and Systems</a> </i> &nbsp;
This article proposes a review of the state of the art in using asynchronous circuit design techniques to achieve energy-efficient and robust digital circuit and system design.  ...  Synchronous techniques have dominated the digital system design landscape for many decades, but their costs are increasingly hard to cope with.  ...  The next Sections review three classes of approaches that suggest methods and tools to achieve robust design of asynchronous digital circuits.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.29292/jics.v16i2.518">doi:10.29292/jics.v16i2.518</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3o2fynlz6rgrlg44dkz5jxp4dq">fatcat:3o2fynlz6rgrlg44dkz5jxp4dq</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20220119134903/https://jics.org.br/ojs/index.php/JICS/article/download/518/352" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/47/c0/47c0dca583437cc003cf6b513b3b7f144f144c46.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.29292/jics.v16i2.518"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> Publisher / doi.org </button> </a>

Automatic Generation of VHDL Code for Self-Timed Circuits from Simulink Specifications

Maurizio Tranchero, Leonardo M. Reyneri
<span title="">2007</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/rxn4zs3ihrbdzom3krpbczphvm" style="color: black;">2007 14th IEEE International Conference on Electronics, Circuits and Systems</a> </i> &nbsp;
It uses CodeSimulink as an environment for code generation. The asynchronous circuits are synthesized using conventional commercial tools and we propose solutions for the issues raised.  ...  This paper introduces a methodology for using selftimed logic in FPGA-based embedded systems starting from a high-level specification of data-flow networks.  ...  The lack of an asynchronous flow for FPGAs and the higher growth of FPGA-based application with respect to the DSP-based one [8] justifies the effort for considering also asynchronous circuits for FPGAs  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icecs.2007.4510986">doi:10.1109/icecs.2007.4510986</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/icecsys/TrancheroR07.html">dblp:conf/icecsys/TrancheroR07</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ing2zenzpbe5dgxpn676wqwre4">fatcat:ing2zenzpbe5dgxpn676wqwre4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20100714140816/http://polimage.polito.it:80/group/papers/icecs07.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/b6/c5/b6c51dd3e895005b1cd994553e343debf9d05c28.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icecs.2007.4510986"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Soft MOUSETRAP: A Bundled-Data Asynchronous Pipeline Scheme Tolerant to Random Variations at Ultra-Low Supply Voltages

Jian Liu, Steven M. Nowick, Mingoo Seok
<span title="">2013</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/plplx3jwbjc33clwi4oo4fxbsq" style="color: black;">2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems</a> </i> &nbsp;
OVERVIEW My main research is on asynchronous and mixed-timing digital design. Asynchronous circuits have no centralized or global clock.  ...  My key goal is to make asynchronous digital design a viable option.  ...  CAD tools are critical to the widespread adoption of asynchronous circuits.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.2013.29">doi:10.1109/async.2013.29</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/async/LiuNS13.html">dblp:conf/async/LiuNS13</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/pgi4on5mbffj3fylrygmhghspy">fatcat:pgi4on5mbffj3fylrygmhghspy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170830014125/http://www1.cs.columbia.edu/~nowick/nowick-fin-research-statement-7-14.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d1/e0/d1e01d2b35d19cd0e23699c5e113828e9336b340.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/async.2013.29"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Modified Micropipline Architecture for Synthesizable Asynchronous FIR Filter Design [article]

Basel Halak, Hsien-Chih Chiu
<span title="2016-03-15">2016</span> <i > arXiv </i> &nbsp; <span class="release-stage" >pre-print</span>
This inherent advantage of asynchronous design over conventional synchronous circuits allows them to be energy efficient.  ...  This paper devises a novel asynchronous design for a finite impulse response (FIR) filter, an essential building block of DSP systems, which is synthesizable and suitable for implementation using conventional  ...  Existing tools for asynchronous circuit design require a significant re-education of designers, and their capabilities are limited compared to commonly used synchronous tools [9, 10] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1603.04627v1">arXiv:1603.04627v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/og3xbc3kizfgxhbdlp3gv5cto4">fatcat:og3xbc3kizfgxhbdlp3gv5cto4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200908043059/https://arxiv.org/ftp/arxiv/papers/1603/1603.04627.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d3/3e/d33ee960e6f5f0959ed4bcd176d364fa99bab961.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1603.04627v1" title="arxiv.org access"> <button class="ui compact blue labeled icon button serp-button"> <i class="file alternate outline icon"></i> arxiv.org </button> </a>

Modified Micropipline Architecture for Synthesizable Asynchronous FIR Filter Design

Basel Halak, Hsien-Chih Chiu
<span title="2016-02-28">2016</span> <i title="Academy and Industry Research Collaboration Center (AIRCC)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/dpfavoemqbeinduj3yjynh557i" style="color: black;">International Journal of VLSI Design &amp; Communication Systems</a> </i> &nbsp;
This inherent advantage of asynchronous design over conventional synchronous circuits allows them to be energy efficient.  ...  This paper devises a novel asynchronous design for a finite impulse response (FIR) filter, an essential building block of DSP systems, which is synthesizable and suitable for implementation using conventional  ...  Existing tools for asynchronous circuit design require a significant re-education of designers, and their capabilities are limited compared to commonly used synchronous tools [9, 10] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.5121/vlsic.2016.7101">doi:10.5121/vlsic.2016.7101</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/u3znzok75raqpfxvjj7ncb7obe">fatcat:u3znzok75raqpfxvjj7ncb7obe</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180604201606/http://www.aircconline.com/vlsics/V7N1/7116vlsi01.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/83/a2/83a228ea5704aa1c65760331018ff38146656fce.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.5121/vlsic.2016.7101"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

On digit-recurrence division algorithms for self-timed circuits

Nicolas Boullis, Arnaud Tisserand, Franklin T. Luk
<span title="2001-11-20">2001</span> <i title="SPIE"> Advanced Signal Processing Algorithms, Architectures, and Implementations XI </i> &nbsp;
This paper compares several digit-recurrence division algorithms (speed, area and circuit activity for estimating the power consumption).  ...  The optimization of algorithms for self-timed or asynchronous circuits requires specific solutions.  ...  Vivet from ST Microelectronics for their help and enthusiastic discussions.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1117/12.448640">doi:10.1117/12.448640</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/lbvctnmecrcwzdeiaq752ywcri">fatcat:lbvctnmecrcwzdeiaq752ywcri</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922020645/https://hal.inria.fr/inria-00072398/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/56/d1/56d1aa3d0f10d74b5ab38fd66c92297642b7a071.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1117/12.448640"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Teaching Asynchronous Design in Digital Integrated Circuits

J.S. Yuan, W. Kuang
<span title="">2004</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/xmupq5sfinftxcmhxiz4wg4ryy" style="color: black;">IEEE Transactions on Education</a> </i> &nbsp;
To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm.  ...  Index Terms-Asynchronous digital circuit, Null Convention Logic (NCL), very-high-speed integration circuit hardware description language (VHDL) simulation.  ...  ., for the discussion on the Null Convention Logic (NCL).  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/te.2004.825923">doi:10.1109/te.2004.825923</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/t7ggbc3ad5bm7oz2zhnyz37blu">fatcat:t7ggbc3ad5bm7oz2zhnyz37blu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20100921015717/http://www.engr.panam.edu:80/~kuangw/ieee_education.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d1/2c/d12c59ab2145bf095a95aab065b73a498ac45c85.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/te.2004.825923"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Design of standard-cell libraries for asynchronous circuits with the ASCEnD flow

Matheus Trevisan Moreira, Ney Laert Vilar Calazans
<span title="">2013</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/k4pq3zhykrd3hdhey2qhybwinu" style="color: black;">2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</a> </i> &nbsp;
This work presents the ASCEnD flow, a design flow devised for the design of components required for the design of asynchronous systems using standard-cells.  ...  This library supported implementation of different circuits, like network-on-chip routers and cryptographic cores.  ...  Fig. 1 . 1 Basic structure of a component required for asynchronous circuits.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isvlsi.2013.6654647">doi:10.1109/isvlsi.2013.6654647</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/isvlsi/MoreiraC13.html">dblp:conf/isvlsi/MoreiraC13</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ufek2wge4bhqvjbibbekzm2lf4">fatcat:ufek2wge4bhqvjbibbekzm2lf4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170706053347/http://www.inf.pucrs.br/%7Ecalazans/publications/2013-ISVLSI-PhD-F_ASCEnD.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/14/b7/14b7ede8001679a0fbae8f3e8b1588c8ed022911.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isvlsi.2013.6654647"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

High Level Synthesis of Asynchronous Circuits from Data Flow Graphs [chapter]

Rene van Leuken, Tom van Leeuwen, Huib Lincklaen Arriens
<span title="">2011</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
The control circuit allows for true asynchronous operation of all digital resources and as a result of its scalable distributed topology allows unlimited resource sharing.  ...  This paper presents a toolbox for the automatic generation of asynchronous circuits starting from a data flow graph description. The toolbox consists of a scheduling and code generation tool.  ...  Since we use scheduling results which are valid for synchronous circuits, we can use the theory of de-synchronization to prove that our asynchronous circuit is able to implement any valid scheduling results  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-642-24154-3_32">doi:10.1007/978-3-642-24154-3_32</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/s75ug6ozorfj7bg7xzziqvcxi4">fatcat:s75ug6ozorfj7bg7xzziqvcxi4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922000334/http://ens.ewi.tudelft.nl/pubs/leuken11h.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/08/eb/08eb2f2dd51657f413de7009a382b3941c0b55ec.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-642-24154-3_32"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

Clock-Less Design Methodology For Digital System Design

Arun M S Sankar, Vishnu V Gopi, Padmakumar K, Dominic George Joseph
<span title="2015-04-15">2015</span> <i title="Tejass Publisheers"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/s7xsrjol7bcyjpobqp3ahbu3ja" style="color: black;">IJIREEICE</a> </i> &nbsp;
The design of a new methodology for asynchronous system development is discussed in this paper.  ...  Here we take into account new research concept which improves digital system implementations, which is basically asynchronous digital design.  ...  Local co-ordination circuit The hazards and race problems in the clock-less digital systems are to be eliminated for ensuring validity of signalling events and meaningful data transfer.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.17148/ijireeice.2015.3414">doi:10.17148/ijireeice.2015.3414</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/yhogoad3n5atvpgoxquofmweum">fatcat:yhogoad3n5atvpgoxquofmweum</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20210116062854/https://www.ijireeice.com/upload/2015/april-15/IJIREEICE%2014.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/6b/0b/6b0b2c6b3b148255538cac702469b57e77a50c36.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.17148/ijireeice.2015.3414"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>
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