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The semantics of x86-CC multiprocessor machine code

Susmit Sarkar, Peter Sewell, Francesco Zappa Nardelli, Scott Owens, Tom Ridge, Thomas Braibant, Magnus O. Myreen, Jade Alglave
2008 Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '09  
We test the semantics against actual processors and the vendor litmus-test examples, and give an equivalent abstract-machine characterisation of our axiomatic memory model.  ...  We also contrast the x86 model with some aspects of Power and ARM behaviour.  ...  We acknowledge the support of a Royal Society University Research Fellowship (Sewell), EPSRC grants GR/T11715, EP/C510712, and EP/F036345, and ANR grant ANR-06-SETI-010-02.  ... 
doi:10.1145/1480881.1480929 dblp:conf/popl/SarkarSNORBMA09 fatcat:fvm7nzborrbm7bbxd3dvsh4xmu

The semantics of x86-CC multiprocessor machine code

Susmit Sarkar, Peter Sewell, Francesco Zappa Nardelli, Scott Owens, Tom Ridge, Thomas Braibant, Magnus O. Myreen, Jade Alglave
2009 SIGPLAN notices  
We test the semantics against actual processors and the vendor litmus-test examples, and give an equivalent abstract-machine characterisation of our axiomatic memory model.  ...  We also contrast the x86 model with some aspects of Power and ARM behaviour.  ...  We acknowledge the support of a Royal Society University Research Fellowship (Sewell), EPSRC grants GR/T11715, EP/C510712, and EP/F036345, and ANR grant ANR-06-SETI-010-02.  ... 
doi:10.1145/1594834.1480929 fatcat:tkxvfndvvzg6djwt5yek7roruq

x86-TSO

Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, Magnus O. Myreen
2010 Communications of the ACM  
First, real multiprocessors typically do not provide the sequentially consistent memory that is assumed by most work on semantics and verification.  ...  We present a new x86-TSO programmer's model that, to the best of our knowledge, suffers from none of these problems.  ...  Acknowledgements We thank Luc Maranget for his work on memevents and litmus, Tom Ridge, Thomas Braibant and Jade Alglave for their other work on the project, and Hans Boehm, David Christie, Dave Dice,  ... 
doi:10.1145/1785414.1785443 fatcat:i7av63m3zzhivdof7j6brqc6om

A Better x86 Memory Model: x86-TSO [chapter]

Scott Owens, Susmit Sarkar, Peter Sewell
2009 Lecture Notes in Computer Science  
Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification.  ...  , with code extracted from a third, more algorithmic, equivalent version of the definition.  ...  The intended scope of x86-TSO, as for the x86-CC model, covers typical user code and most kernel code: programs using coherent write-back memory, without exceptions, misaligned or mixed-size accesses,  ... 
doi:10.1007/978-3-642-03359-9_27 fatcat:hchqhp3qevagvowvnxjp2mcj5i

Relaxed-memory concurrency and verified compilation

Jaroslav Ŝevčik, Viktor Vafeiadis, Francesco Zappa Nardelli, Suresh Jagannathan, Peter Sewell
2011 SIGPLAN notices  
In this paper, we consider the semantic design and verified compilation of a C-like programming language for concurrent sharedmemory computation above x86 multiprocessors.  ...  We define a concurrent relaxed-memory semantics for ClightTSO, an extension of CompCert's Clight in which the processor's memory model is exposed for high-performance code.  ...  can become defined) Asm (x86) Printing of x86 AST, assembly and linking Machine code (x86) We need a stack of memory-model-aware abstractions for the intermediate languages.  ... 
doi:10.1145/1925844.1926393 fatcat:lycmh32gzzfwrmdjbk3kilnwhe

Relaxed-memory concurrency and verified compilation

Jaroslav Ŝevčik, Viktor Vafeiadis, Francesco Zappa Nardelli, Suresh Jagannathan, Peter Sewell
2011 Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '11  
In this paper, we consider the semantic design and verified compilation of a C-like programming language for concurrent sharedmemory computation above x86 multiprocessors.  ...  We define a concurrent relaxed-memory semantics for ClightTSO, an extension of CompCert's Clight in which the processor's memory model is exposed for high-performance code.  ...  can become defined) Asm (x86) Printing of x86 AST, assembly and linking Machine code (x86) We need a stack of memory-model-aware abstractions for the intermediate languages.  ... 
doi:10.1145/1926385.1926393 dblp:conf/popl/SevcikVNJS11 fatcat:o4p6zvhpqbhb5b4nte5w6afb6i

The semantics of power and ARM multiprocessor machine code

Jade Alglave, Anthony Fox, Samin Ishtiaq, Magnus O. Myreen, Susmit Sarkar, Peter Sewell, Francesco Zappa Nardelli
2008 Proceedings of the 4th workshop on Declarative aspects of multicore programming - DAMP '09  
This should provide a good basis for informal reasoning and formal verification of low-level code for these weakly consistent architectures, and, together with our x86 semantics, for the design and compilation  ...  We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets.  ...  We acknowledge the support of EPSRC grants GR/T11715, EP/C510712, and EP/F036345, and ANR grant ANR-06-SETI-010-02.  ... 
doi:10.1145/1481839.1481842 dblp:conf/popl/AlglaveFIMSSN09 fatcat:h4dlhsfd4zcbfkuggpyfrj7nkm

CompCertTSO

Jaroslav Ševčík, Viktor Vafeiadis, Francesco Zappa Nardelli, Suresh Jagannathan, Peter Sewell
2013 Journal of the ACM  
We describe ClightTSO, a concurrent extension of CompCert's Clight in which the TSO-based memory model of x86 multiprocessors is exposed for high-performance code, and CompCertTSO, a formally verified  ...  In this paper, we consider the semantic design and verified compilation of a C-like programming language for concurrent shared-memory computation on x86 multiprocessors.  ...  ACKNOWLEDGMENT We thank Xavier Leroy for enlightening discussions and comments on drafts, and for making CompCert available, and the anonymous reviewers for their helpful remarks.  ... 
doi:10.1145/2487241.2487248 fatcat:xg3dizzc6barvjs2kuktpw2qai

Litmus: Running Tests against Hardware [chapter]

Jade Alglave, Luc Maranget, Susmit Sarkar, Peter Sewell
2011 Lecture Notes in Computer Science  
Shared memory multiprocessors typically expose subtle, poorly understood and poorly specified relaxed-memory semantics to programmers.  ...  The actual relaxed memory model exposed to the programmer by a particular multiprocessor is often unclear.  ...  Introduction Modern shared memory multiprocessors do not actually provide the sequentially consistent (SC) memory semantics [Lam79] typically assumed in concurrent program verification.  ... 
doi:10.1007/978-3-642-19835-9_5 fatcat:2iq6gfebdbfnjo4zo3oeduwtvm

High-Assurance Separation Kernels: A Survey on Formal Methods [article]

Yongwang Zhao, David Sanan, Fuyuan Zhang, Yang Liu
2017 arXiv   pre-print
They are introduced to decouple the analysis of applications in partitions from the analysis of the kernel itself.  ...  In accordance with the analytical framework, a comprehensive analysis and discussion of related work are presented.  ...  order axiomatic semantic model of the memory, and machine registers.  ... 
arXiv:1701.01535v1 fatcat:wivlgaqkmffc5nb2kalmpy77sy

RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions

Marco Elver, Vijay Nagarajan
2015 2015 International Conference on Parallel Architecture and Compilation (PACT)  
We show an approach for the x86-64 architecture, which is a compromise between the two.  ...  In particular, existing architectures with stricter consistency models (such as x86-64) cannot readily make use of lazy coherence protocols without either: changing the architecture's consistency model  ...  This work is partly funded by EPSRC grants EP/M027317/1 and EP/M001202/1 to the University of Edinburgh.  ... 
doi:10.1109/pact.2015.37 dblp:conf/IEEEpact/ElverN15 fatcat:46vtq4xyjfhiro25hf5b6iz43y

Reasoning about the Implementation of Concurrency Abstractions on x86-TSO [chapter]

Scott Owens
2010 Lecture Notes in Computer Science  
Of particular interest are the low-level implementations of the abstractions that support language-level concurrency-especially because they invariably contain data races.  ...  Our principle, called triangularrace freedom, strengthens the usual data-race freedom style of reasoning.  ...  We also thank Dave Dice for bringing the "Parker" bug to our attention, and thank the ECOOP reviewers for their suggestions. We acknowledge funding from EPSRC grant EP/F036345.  ... 
doi:10.1007/978-3-642-14107-2_23 fatcat:gxyprykh5jchbokclnlzt6b2xa

Scalable validation of binary lifters

Sandeep Dasgupta, Sushant Dinesh, Deepan Venkatesh, Vikram S. Adve, Christopher W. Fletcher
2020 Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation  
The ability to directly reason about binary machine code is desirable, not only because it allows analyzing binaries even when the source code is not available (e.g., legacy code, closed-source software  ...  First, I defined the most complete and thoroughly tested formal semantics of x86-64 to date.  ...  TSL [91] is a system that can auto-generate tools for various machine code analyses given a semantics definition of the machine language written in the TSL specification.  ... 
doi:10.1145/3385412.3385964 dblp:conf/pldi/DasguptaDVAF20 fatcat:3khjl5gbmnetjay23fk3sc2ktu

Automatic generation of application-specific accelerators for FPGAs from python loop nests

David Sheffield, Michael Anderson, Kurt Keutzer
2012 22nd International Conference on Field Programmable Logic and Applications (FPL)  
Design space exploration on the FPGA proceeds by varying the number of PEs in the system. Over four benchmark kernels, our system achieves 3× to 6× relative to soft-core C performance.  ...  It does this to uncover parallelism and divide computation between multiple parallel processing elements (PEs) that are automatically generated through high-level synthesis of the optimized loop body.  ...  We also exploit the ability to generate machine code for our x86 desktop CPUs in LLVM framework. We use this ability to check the correctness of our front-end.  ... 
doi:10.1109/fpl.2012.6339372 dblp:conf/fpl/SheffieldAK12 fatcat:hphpwnv4uvdkxlwhptkr6p7ery

Don't Sit on the Fence

Jade Alglave, Daniel Kroening, Vincent Nimal, Daniel Poetzl
2017 ACM Transactions on Programming Languages and Systems  
Modern architectures rely on memory fences to prevent undesired weakenings of memory consistency. As the fences' semantics may be subtle, the automation of their placement is highly desirable.  ...  But precise methods for restoring consistency do not scale to deployed systems code. We choose to trade some precision for genuine scalability: our technique is suitable for large code bases.  ...  Acknowledgements We thank Michael Tautschnig for the Debian binaries, Mohamed Faouzi Atig, Egor Derevenetc, Carsten Fuhs, Alexander Linden, Roland Meyer, Tyler Sorensen, Martin Vechev, Eran Yahav and our  ... 
doi:10.1145/2994593 fatcat:yrh63pmbjzbntjbwlnpayeopuy
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