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Efficient buffer allocation on shared-memory multiprocessors
1992
IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems
Despite its importance, the low-contention regime has been largely neglected. ...
1 There has been much work done modeling, simulating, and measuring the performance of locking primitives under high levels of contention. ...
Finally, if a CPU on some other quad last write-acquired the lock, or if the owning CPU last read-acquired the lock, the cost will be t s . ...
doi:10.1109/hpcs.1992.759449
fatcat:pjwl6t45qzavlojs7siq32o43m
A Simple Improvement of the Work-stealing Scheduling Algorithm
2010
2010 International Conference on Complex, Intelligent and Software Intensive Systems
Work-stealing is the todays algorithm of choice for dynamic load-balancing of irregular parallel applications on multiprocessor systems. ...
We have evaluated the algorithm's efficiency on a variety of workloads, including scatter-gather workloads, which occur in common algorithms such as MapReduce. ...
The original algorithm, as described in [3] places the task on the same CPU as the task that is doing the unblocking. The modified algorithm places the task on the last CPU that it was executed on. ...
doi:10.1109/cisis.2010.67
dblp:conf/cisis/VrbaHG10
fatcat:5qj3vqlnobcpbg6xstlz5vdftu
Multithread Affinity Scheduling Using a Decision Maker
2018
Asian Journal of Computer and Information Systems
The affinity scheduling concept is to make an effort to have a thread run on the same CPU it ran on the last time. ...
Usually, each CPU has its private cache. To increase the throughput of the system, it is preferred to use affinity scheduling. ...
ACKNOWLEDGEMENTS As a group of National University employees, the authors also thank and gratefully acknowledge the help and support received from the administration, staff, and faculty members at National ...
doi:10.24203/ajcis.v6i4.5430
fatcat:fmskrnvbevcijk7336jytpflna
Fuzzy zero day exploits detector system
2017
International Journal of Advanced Computer Research
Conflicts of interest The authors have no conflicts of interest to declare. ...
(if known)) o Number of active processes o Number of new processes over the last second o Number of new processes over the last 5 seconds o Number of new processes over the last 30 seconds o Number of ...
threads o Number of new threads over the last second o Number of new threads over the last 5 seconds o Number of new threads over the last 30 seconds o Moving average of number of processes, measured ...
doi:10.19101/ijacr.2017.730022
fatcat:6fv54p7jergn5j6lrlaodwye2q
iCHAT: Inter-cache Hardware-Assistant Data Transfer for Heterogeneous Chip Multiprocessors
2014
2014 9th IEEE International Conference on Networking, Architecture, and Storage
This paper proposes a novel approach called iCHAT (inter-Cache Hardware-Assistant data Transfer) to manage data transfer between the CPU cache and the GPU cache efficiently. ...
With tighter integration of CPU and GPU, it is critical to share and move data more efficiently in order to leverage the computational power that a GPU can provide. ...
data and has continuous page ID following the last evicted page. ...
doi:10.1109/nas.2014.43
dblp:conf/nas/GuBCH14
fatcat:7twx7lgcsrg5bpewbqhdj73aey
Online Scheduling of Task Graphs on Hybrid Platforms
[chapter]
2018
Lecture Notes in Computer Science
Phase 1 -kτ independent tasks p i = τ ; p i = 1 : A needs a time τ Phase 2 -same as phase 1, but are successors of the last task Phase 3 -same as phase 2, but are successors of the last task Phase x -. ...
Phase 1 -kτ independent tasks p i = τ ; p i = 1 : A needs a time τ Phase 2 -same as phase 1, but are successors of the last task Phase 3 -same as phase 2, but are successors of the last task τ τ kτ Graph ...
doi:10.1007/978-3-319-96983-1_14
fatcat:w2cnpmoezbfrbk4chr5zob6rmq
Page 1021 of The Journal of Neuroscience Vol. 26, Issue 3
[page]
2006
The Journal of Neuroscience
The CPu and ICPu groups showed similar trends, although only the increase in the last response for the |CPu group was statisti- ...
for the last nose poke (positive interference). ...
Evaluating Power Consumption and Real-time Performance of Android CPU Governors
안드로이드 CPU 거버너의 전력 소비 및 실시간 성능 평가
2016
The Journal of the Korean Institute of Information and Communication Engineering
안드로이드 CPU 거버너의 전력 소비 및 실시간 성능 평가
The power consumed by a CPU is approximately proportional to the square of the CPU supply voltage. Therefore, lower CPU operating frequency allows the CPU supply voltage to be lowered. ...
The DVFS is a power management technique where the CPU operating frequency is decreased to allow a corresponding reduction in the CPU supply voltage. ...
utilization since the last sampling;
Calculate prevCPUfreqSpendTime since last CPUfreq change;
if (CPUState == WAKEUPfromSLEEP) {
CPUfreq = SLEEP_WAKEUP_FREQ;
return;
} else if (CPUstate == SLEEP ...
doi:10.6109/jkiice.2016.20.12.2401
fatcat:5phf6xvbn5gg3nxjv52w5f2aba
Effect of apomorphine on striatal synaptotagmin 7 mRNA levels in reserpinized rats
2007
Neuroscience Letters
Dopaminergic drugs have been shown to modulate its expression in the striatum. ...
It may be concluded, that in the striatum depleted of biogene amines, such as occurs after reserpine treatment, the up-regulation of Syt 7 could play a specific role as part of hypersensitive response ...
Animals were killed 8 h after the last injection. ...
doi:10.1016/j.neulet.2007.07.033
pmid:17719177
fatcat:lydlamex35aq3gsmf4jj4f2a54
A Neural Net-Based Approach for CPU Utilization
2017
Bilişim Teknolojileri Dergisi
The utilization of CPU depends on the selection of scheduling algorithms. ...
CPU scheduling is an important subject to maximize CPU utilization in the context of operating systems. ...
Once CPU has started executing a process, it cannot be interrupted unless completed. 2.2 Last-Come, First-Served Scheduling LCFS, allows a process that requests CPU last, holds the CPU first. ...
doi:10.17671/gazibtd.331037
fatcat:avplt6anrzeelks4ylcmqsnw2m
Logical partition mode physical resource management on the IBM eServer z990
2004
IBM Journal of Research and Development
processing units (CPUs) from multiple books; second, access from CPUs to memory on books other than the book on which a CPU is resident is not as efficient as access from the same book. ...
This paper describes changes made to the zSeries LPAR hypervisor to manage CPU and memory resources on the z990 machine topology. ...
Acknowledgments The authors thank the anonymous reviewers of this paper for their insightful comments. *Trademark or registered trademark of International Business Machines Corporation. ...
doi:10.1147/rd.483.0535
fatcat:52seppawlbh7paigroszcovyze
Time course of striatal ΔFosB-like immunoreactivity and prodynorphin mRNA levels after discontinuation of chronic dopaminomimetic treatment
2003
European Journal of Neuroscience
Abbreviations CPu, caudate putamen; CREB, cAMP response element-binding protein; DA, dopamine; ISHH, in situ hybridization histochemistry; 6-OHDA, 6-hydroxydopamine; PDyn, prodynorphin. ...
Acknowledgements The study was supported by grants from the Swedish Association of the Neurologically Disabled, the Craaford Foundation, the Kocks Foundations, the Segerfalks Foundation, the Wiberg Foundation ...
In the medial part of the CPu, PDyn mRNA levels were upregulated by 85% at 3 h after the last administration of cocaine ( Fig. 2E ; P < 0.05 vs controls; compare Fig. 3M and P). ...
doi:10.1046/j.1460-9568.2003.02469.x
pmid:12581184
fatcat:7tugkkvkdfdode3aehnyckgrvy
Where does the power go in a computer system: Experimental analysis and implications
2011
2011 International Green Computing Conference and Workshops
In the last few years the power dissipation problem of computer systems has attracted more and more attention. ...
Our experiment results, however, show that CPU utilization is not an accurate reflection of the CPU power. ...
The last two test will make only one core of the CPU in fully busy state and another CPU in idle state. ...
doi:10.1109/igcc.2011.6008598
dblp:conf/green/ChenWS11
fatcat:sojbznxqtbdt5eficauf5o5vsu
Glossary
[chapter]
2021
High Performance Parallel Runtimes
Amdahl's law A simple formula to compute the maximum performance of a parallel code depending on the degree of parallelism available in the hardware and the serial fraction of the code. ...
The compiled-code implementation of an API. ...
LILO time Last In to Last Out time; for a collective operation, the elapsed wallclock time between the last thread arriving and the last thread leaving. ...
doi:10.1515/9783110632729-206
fatcat:eghjr4zflremvi2dd5gduxkaou
Detecting Direction of Pepper Stem by Using CUDA-Based Accelerated Hybrid Intuitionistic Fuzzy Edge Detection and ANN
2016
Journal of Sensors
Then the multilayer perceptron artificial neural network has been used for the classification of patterns in processed images. ...
In this study, image processing algorithm has been developed by using CUDA (GPU) which is 79 times faster than CPU. ...
Threshold value from the numeric values of the pattern on each application is 133. ANN algorithm on CPU-based applications lasts 75 ms and on GPU-based application lasts almost 76 ms. ...
doi:10.1155/2016/4052101
fatcat:6jlgwrsswnhezcj7wzcfvdggca
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