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The gem5 simulator

Nathan Binkert, Somayeh Sardashti, Rathijit Sen, Korey Sewell, Muhammad Shoaib, Nilay Vaish, Mark D. Hill, David A. Wood, Bradford Beckmann, Gabriel Black, Steven K. Reinhardt, Ali Saidi (+4 others)
2011 SIGARCH Computer Architecture News  
Using the encoding scheme to assign VPNs for VAs, it is shown that the system can tolerate soft errors using software with the help of the discussed decoding techniques applied to the page fault handler  ...  The proposed solution can be used on all of the architectures using virtually indexed addressing.  ...  The work is in the framework of COST ICT Action 1103 Manufacturable and Dependable Multicore Architectures at Nanoscale.  ... 
doi:10.1145/2024716.2024718 fatcat:4rj2ut4pyve5dacs5ostiwshji

The gem5 Simulator: Version 20.0+ [article]

Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Brad Beckmann, Srikant Bharadwaj, Gabe Black, Gedare Bloom (+66 others)
2020 arXiv   pre-print
The gem5 simulator has been under active development over the last nine years since the original gem5 release.  ...  In this paper, we give and overview of gem5's usage and features, describe the current state of the gem5 simulator, and enumerate the major changes since the initial release of gem5.  ...  The contributions to the gem5 community go beyond just the source code, and many people who have contributed to the broader gem5 community are not acknowledged here.  ... 
arXiv:2007.03152v2 fatcat:jsz5yhipxrfypg5yhhbwpb5sc4

Empirical CPU power modelling and estimation in the gem5 simulator

Basireddy Karunakar Reddy, Matthew J. Walker, Domenico Balsamo, Stephan Diestelhorst, Bashir M. Al-Hashimi, Geoff V. Merrett
2017 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)  
Experimental validation with 15 workloads at four DVFS levels on real hardware and gem5 has been conducted to understand how the difference between the gem5 simulated activity statistics and the hardware  ...  Power simulators, combined with a full-system architectural simulator such as gem5, enable power-performance trade-offs to be investigated early in the design of a system with different configurations  ...  ACKNOWLEDGMENT This work was supported by EPSRC Grant EP/K034448/1 (the PRiME Programme  ... 
doi:10.1109/patmos.2017.8106988 dblp:conf/patmos/ReddyWBDAM17 fatcat:ohddtkh4rzeh7dlqrdn22miryy

Evaluation of the scalability property of the program for the simulation of atmospheric chemical transport by means of the simulator gem5
Оценка масштабируемости программы расчета движения примесей в атмосфере средствами симулятора gem5

Artem Nikolaevich Semakin
2020 Компьютерные исследования и моделирование  
участков кода переносится на физический процессор компьютера, где работает gem5, а непосредственно внутри симулятора выполняется лишь исследуемый целевой кусок кода.  ...  Также в статье рассматриваются подробный порядок настройки симулятора gem5 и наиболее оптимальный с точки зрения временных затрат способ проведения симуляций, когда выполнение не представляющих интерес  ...  Also in this work we describe how to configure gem5 and how to perform simulations with gem5 in the most optimal way.  ... 
doi:10.20537/2076-7633-2020-12-4-773-794 fatcat:ybqmj2we6vaxpclby2pwe6mfoa

SST + gem5 = A Scalable Simulation Infrastructure for High Performance Computing

Mingyu Hsieh, Jie Meng, Michael Levenhagen, Kevin Pedretti, Ayse Coskun, Arun Rodrigues
2012 Proceedings of the Fifth International Conference on Simulation Tools and Techniques  
To address this problem, we integrate the highly detailed gem5 performance simulator into the parallel Structural Simulation Toolkit (SST).  ...  We add the fast-forwarding capability in the SST/gem5 and port the lightweight Kitten operating system on gem5.  ...  Acknowledgments Sandia National Laboratories is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy's National Nuclear Security  ... 
doi:10.4108/icst.simutools.2012.247745 dblp:conf/simutools/HsiehPMCLR12 fatcat:ujxygougarhijpnfc3vzoqpydq

Micro-architectural simulation of embedded core heterogeneity with gem5 and McPAT

Fernando A. Endo, Damien Couroussé, Henri-Pierre Charles
2015 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation Methods and Tools - RAPIDO '15  
Our simulation framework is based on the open-source gem5 and McPAT simulators. The main contribution is to report our experience with both simulators.  ...  Currently, there is no opensource simulator that can estimate the energy and performance trade-offs of asymmetric ARM cores at the micro-architectural level.  ...  SIMULATION FRAMEWORK This section details the performance and energy simulation of Cortex-A cores. gem5 gem5 [5] is a cycle-accurate micro-architectural simulator.  ... 
doi:10.1145/2693433.2693440 dblp:conf/hipeac/EndoCC15 fatcat:v6u7lgk4wbcvtfid76ooqpuwny

Vulnerability Assessment of the Rowhammer Attack Using Machine Learning and the gem5 Simulator - Work in Progress

Loïc France, Maria Mushtaq, Florent Bruguier, David Novo, Pascal Benoit
2021 Proceedings of the 2021 ACM Workshop on Secure and Trustworthy Cyber-Physical Systems  
In this paper, we propose a tool to build a system-specific detection mechanism using gem5 to simulate the system and Machine Learning to detect the attack by analyzing hardware event traces.  ...  The main memory is the target of a security attack called Rowhammer, which causes bit flips in adjacent victim cells of aggressor rows.  ...  Acknowledgements The authors acknowledge the support of the French Agence Nationale de la Recherche (ANR), under grant ANR-19-CE39-0008 (project ARCHI-SEC).  ... 
doi:10.1145/3445969.3450425 fatcat:7i55ss7tmvb4jfxw77aw5tfbqq

Modifying Instruction Sets In The Gem5 Simulator To Support Fault Tolerant Designs

Chuan Zhang
Therefore, another objective of this thesis is to develop a method for inserting new instructions in the Gem5 simulator and cross compiler.  ...  However, the checking instructions are not included in the instruction set and as a result, are not supported by current architecture simulators.  ...  The main reason for choosing Gem5 is that it is the most popular simulator for computer architecture research.  ... 
doi:10.7275/7088170 fatcat:3lyxlsanhjekjahjoyqhbvrhly

Integration of Gem5 And Dramsim2 For DDR4 Simulation

Karunamurthy P
2020 International Journal of Advanced Trends in Computer Science and Engineering  
Based on the simulation results, GEM5 DRAMSim2 has verified its correctness and legal to be used for DDR4 simulations.  ...  This research proved that the integrated GEM5 DRAMSim2 is an effective and efficient simulator for DRAM simulations.  ...  The first part is to validate the correctness of GEM5 DRAMSim2 for the DDR4 simulation.  ... 
doi:10.30534/ijatcse/2020/99912020 fatcat:eymzlkem3bdhpe4qqbhqe3kblu

gem5-gpu: A Heterogeneous CPU-GPU Simulator

Jason Power, Joel Hestness, Marc S. Orr, Mark D. Hill, David A. Wood
2015 IEEE computer architecture letters  
We also discuss possible extensions to the simulator. gem5-gpu is open source and available at  ...  It builds on gem5, a modular fullsystem CPU simulator, and GPGPU-Sim, a detailed GPGPU simulator. gem5-gpu routes most memory accesses through Ruby, which is a highly configurable memory system in gem5  ...  ACKNOWLEDGMENTS We thank both the gem5 and GPGPU-Sim communities. This work is supported in part with NSF grants CNS-1117280, CCF-1218323, and CNS-1302260.  ... 
doi:10.1109/lca.2014.2299539 fatcat:tvtqp3binzczpegoau5wdatqau

gem5 + rtl: A Framework to Enable RTL Models Inside a Full-System Simulator

Guillem López-Paradís, Adrià Armejach, Miquel Moretó
2021 50th International Conference on Parallel Processing  
In this paper, we introduce gem5+rtl, a flexible framework that enables simulation of RTL models inside a full-system software simulator.  ...  However, available tools to simulate low-level RTL designs often neglect the target system in which the design will operate.  ...  the DRAC project  ... 
doi:10.1145/3472456.3472461 fatcat:x7xvied3tjfbtect2cutdjh5fu

dBscope: Infrastructure to enable fine-grained characterization of database workloads on gem5 [article]

Cesar Avalos, Christin Bose
2022 Zenodo  
dBscope is an infrastructure to enable fine grained analysis of database workloads on the popular computer architecture simulator gem5.  ...  This artifact contains the disk image with mysql, postgresql and the benchmarks pre-configured and the scripts to run them.  ...  You can run the script with the -g parameter. build/X86/gem5.opt -g Note down the port opened by the simulator, i.e. this line system.pc.com_1.device: Listening for connections on port  ... 
doi:10.5281/zenodo.6514692 fatcat:jdploubmirbahlbut5dw44tt5y

Fast and Accurate Edge Computing Energy Modeling and DVFS Implementation in GEM5 Using System Call Emulation Mode

Yahya H. Yassin, Magnus Jahre, Per Gunnar Kjeldsberg, Snorre Aunet, Francky Catthoor
2020 Journal of Signal Processing Systems  
Together with the GEM5 output statistics, the model accurately estimates the total energy consumption of our simulated system.  ...  The results from our modified GEM5 simulator are validated with representative signal processing applications.  ...  The same experiments have now been performed using the GEM5 DVFS simulator.  ... 
doi:10.1007/s11265-020-01544-z fatcat:ltotd2qvwzenhgdmdzzizo7uxm

Micro-architectural simulation of in-order and out-of-order ARM microprocessors with gem5

Fernando A. Endo, Damien Courousse, Henri-Pierre Charles
2014 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)  
We explain how to simulate Cortex-A8 and Cortex-A9 cores in gem5, and compare the execution time of ten benchmarks with real hardware.  ...  This article describes the implementation and accuracy evaluation of a micro-architectural simulator of Cortex-A cores, supporting in-order and out-of-order pipelines and based on the open-source gem5  ...  ACKNOWLEDGMENT The authors would like to thank Alexandre Aminot, Victor Lomüller and anonymous readers for their reviews and suggestions.  ... 
doi:10.1109/samos.2014.6893220 dblp:conf/samos/EndoCC14 fatcat:cgrdjxyorncb3dy6bkhojfhx5u

Sources of error in full-system simulation

Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel Paver
2014 2014 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)  
We design a custom gem5 configuration and make several changes to the simulator itself in order to more closely match the Versatile Express TC2 board.  ...  In this work we investigate the sources of error in gem5-a state-of-the-art computer simulator-by validating it against a real hardware platform: the ARM Versatile Express TC2 development board.  ...  The gem5 Simulator The gem5 simulator [2] is a collaborative project based on the M5 simulator [3] and the Ruby component of GEMS.  ... 
doi:10.1109/ispass.2014.6844457 dblp:conf/ispass/GutierrezPDMSEHP14 fatcat:iszfrq5bsbgmvdpcwn6bvbl6ei
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