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The Parallel Protocol Engine

M. Kaiserwerth
<span title="">1993</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/wn5qtqh7ejhpfdjtrxhija73bq" style="color: black;">IEEE/ACM Transactions on Networking</a> </i> &nbsp;
Instead of choosing a highly specialized solution, such as the VMP Network Adapter Board [22] designed specifically for VMTP, or the chip set designed for XTP [4], [26], we decided to develop a general-purpose  ...  presents a third approach: the design and implementation of a new multiprocessor architecture for a communication subsystem that allows full use of the bandwidth available on today's high-speed networks  ...  This increases the end-to-end delay for UDP to 308 jLs.2T he VMP Network Adapter Board (NAB) [22] is a communication subsystem used in the VMP multiprocessor specifically designed to execute the Versatile  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/90.266053">doi:10.1109/90.266053</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/kpwbarj5vfdp7owaupirfo5ili">fatcat:kpwbarj5vfdp7owaupirfo5ili</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20030329220418/http://members.jcom.home.ne.jp:80/1355/The-parallel-protocol-engine%20-%20TON%2093.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/9c/81/9c81748bb4f0af13a310b3da569c47855d90f821.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/90.266053"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

A VLSI receiver architecture for high speed ATM computer networks

Jeffrey Chow
<span title="">1994</span>
In ATM networks, the problem of reassembly of cells at network speeds on the receiver side, is of particular significance. The Adaptation Layer is responsible for cell reassembly.  ...  As the high-speed ATM networking protocol gains widespread acceptance in the networking community, dedicated high-speed protocol processing hardware is required to process ATM's small 53 byte cells.  ...  ATM Data at Different Bit Rates 20 Table 4.3.1 Description of State Data Structure Elements 37 and Cheriton [Kan88] developed the VMP Network Adapter Board(NAB) which implements a new transport  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.14288/1.0087374">doi:10.14288/1.0087374</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/yxy2u4kouvhlxgotlfmibunpnu">fatcat:yxy2u4kouvhlxgotlfmibunpnu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200217105441/https://open.library.ubc.ca/media/download/pdf/831/1.0087374/1" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/6c/f4/6cf4b9a6066fb2de8e64e49cb515fe1f6a2d7bc7.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.14288/1.0087374"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>