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Making the most of VLSI in microcomputers

Jerry L. Corbin
1982 Proceedings of the June 7-10, 1982, national computer conference on - AFIPS '82  
An introduction to the innovative SCAT design philosophy for VLSI microcomputers of Texas Instruments (TI) is presented.  ...  The recently announced 8-bit TMS7000 Microcomputer family is used as an example of a SCAT design.  ...  random logic with a Control ROM to implement mtemal control of the TMS7000 microcomputer.  ... 
doi:10.1145/1500774.1500785 dblp:conf/afips/Corbin82 fatcat:g4tz4dqak5frblyk6adfm7nx2a

IEEE Micro

1983 IEEE Micro  
The VLSI Control Structure of a CMOS Microcomputer Floppy Disk Data Transfer Techniques Fast Entry Path into User Microcode on the VAX-1 1/780 Binary-Decision-Based Programmable Controllers--Part IlIl  ... 
doi:10.1109/mm.1983.291173 fatcat:cdqqdq5gifaq7mc6sdknpqpuom

MicroNews

1986 IEEE Micro  
The design process employed a combination of structured semicustom (macrocell library), structured custom, and true custom techniques.  ...  Six VLSI chips with 786,000 transistor sites were fabricated with a 1 .2-,um N-well, double-layer-metal CMOS process.  ... 
doi:10.1109/mm.1986.304753 fatcat:rmgiihevkzh7npcao3yxf3mm2q

D&T Conferences

1986 IEEE Design & Test of Computers  
regular structures (for example, PLAs and ROMs) and scan design for control structures can relieve the complexity of microprocessor testing.Held in Pacific Grove, CA, 20 papers were compiled dealing with  ...  Larry Whitcomb of Seeq described a microcomputer debugging and verification tool intended to provide cross-referenced information relating the intent of tests to the internal operations of the device.  ... 
doi:10.1109/mdt.1986.295003 fatcat:q36icdko3rcivdieaaoacmvup4

The application of threshold logic to the design of sequential machines

Gilbert M. Masters, Richard L. Mattson
1966 Annual Symposium on Switching and Automata Theory  
Digital Communication through fading multi-path channels: Characterization of fading multi-path channels, the effect of signal characteristics on the choice of a channel model, frequency-Nonselective,  ...  slowly fading channel, diversity techniques for fading multi-path channels, Digital signal over a frequency-selective, slowly fading channel, coded wave forms for fading channels, multiple antenna systems  ...  Data Subsystems, Storage Modules, Functional Modules, Data paths, Control Subsystems, Micro programmed Controller, Structure of a micro 18 programmed controller, Micro instruction Format, Micro instruction  ... 
doi:10.1109/swat.1966.29 dblp:conf/focs/MastersM66 fatcat:ierxfghv4vcpbbh2iaktwfdzlm

VLSI top-down design based on the separation of hierarchies

L. Spaanenburg, A. Broekema, J. Leenstra, C. Huys
1986 Microprocessing and Microprogramming  
Despite the presence of structure, interactions between the three views on VLSI design still lead to lengthy iterations.  ...  This separated hierarchy allows top-down design with functional abstractions as exemplified by an experimental self-timed CMOS RISC computer design.  ...  First the VLSI design space is discussed in terms of views and abstractions.  ... 
doi:10.1016/0165-6074(86)90062-1 fatcat:wxt5ijx7oze3xi3glefhs767li

A Novel Design of Mealy Machine Equivalence in Vlsi Technology

2019 VOLUME-8 ISSUE-10, AUGUST 2019, REGULAR ISSUE  
In this paper begin of a Novel Design of Mealy Machine Equivalence in VLSI Technology.  ...  The pattern in structure and assembling of extremely huge scale incorporated circuit shows a progressing move towards littler gadgets on expanding wafer measurements.  ...  New advances have risen to additionally expand circuit speed and to lessen structure and innovation limitations. Models are joined bipolar-CMOS (BICMOS) and CMOS in silicon on the cover (SOI).  ... 
doi:10.35940/ijitee.b7550.129219 fatcat:3wsdqkpnsnb7rf3fxxsshw6s3u

Tracing the thermal behavior of ICs

V. Szekely, M. Rencz, B. Courtois
1998 IEEE Design & Test of Computers  
Acknowledgments The Therminic CP940922 EU Copernicus and the OMFB 4068 Hungarian R&D Fund projects supported this work.  ...  (A special section of the IEEE Transactions on VLSI Systems gives a good overview of this topic. 5 ) .  ...  The reason is that temperature changes do not cause an additional control on a logic gate; the noise margin is much higher than the equivalent voltage of an excess thermal control.  ... 
doi:10.1109/54.679204 fatcat:er2rsn663fbsxjdj5kmcbvlfve

A Digital Engineering Curriculum for the New Millennium

L. T. Walczowski, K. R. Dimond, W. A. J. Waller
2000 International Journal of Electrical Engineering Education  
This paper examines the development of a digital engineering curriculum, which closely integrates EDA tools and multimedia courseware into the syllabus.  ...  It describes the software that has been integrated, including tools for schematic capture, logic simulation, VLSI design and high-level simulation and highlights the advantages of closely integrating computer-based  ...  Acknowledgements We acknowledge with thanks the support of Altera via their University Programme.  ... 
doi:10.7227/ijeee.37.1.10 fatcat:b45i7slblrbuhhppqdp4jy2vci

ICCD '83: Rye Town Hilton, Port Chester, New York, October 31-November 3,1983

1983 Computer  
He also managed the design and production of add-on memories for the IBM 360/67 and the development of an in-house micro-controlled computer.  ...  Silicon: A brief review of the current technology is presented. Computer Aided Design: A comparison is made on several silicon vendor and purchasable CAD systems.  ...  Paul Low, Vice-President of IBM General Technology Division on Tuesday, November 1, 1983 between 1:30-2:00 pm; Dr.  ... 
doi:10.1109/mc.1983.1654441 fatcat:vzi3mrn23vcsripabvlfqgmbkm

A 30- mu A data-retention pseudostatic RAM with virtually static RAM mode

K. Sawada, T. Sakurai, K. Nogami, K. Sato, T. Shirotori, M. Kakuma, S. Morita, M. Kinugawa, T. Asami, K. Narita, J. Matsunaga, A. Higuchi (+2 others)
1988 IEEE Journal of Solid-State Circuits  
In 1979 he joind the Semi-Japan. He has been engaged in the research and development of CMOS memories, and is currently working on evaluation technology of VLSI memories.  ...  The PSRAM is no address-multiplexed version of a DRAM. The PSRAM requires refresh timing control on the user's side, but the operation speed is fast.  ...  He received the B.S. degree in applied physics,and the M. S. and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1970 , 1972 , and 1975 In 1975  ... 
doi:10.1109/4.250 fatcat:vzqkgjz7cncz5j3nhyb3d34f24

Technology trends in microcomputer control of electrical machines

B.K. Bose
1988 IEEE transactions on industrial electronics (1982. Print)  
The paper gives a comprehensive review of state-of-the-art motion control technology in which the salient technical features of electrical machines, power electronic circuits, microcomputer control, VLSI  ...  Microcomputer-based intelligent motion control systems which constitute the workhorses in the automated environment will play a significant role in the forthcoming era.  ...  The supremacy of the microcomputer has been challenged recently by semi-custom or custom-VLSI circuits. Typically, a chip containing 100,000 or more devices is defined as a VLSI chip.  ... 
doi:10.1109/41.3080 fatcat:n5rjpmxn6zauxert5limbxnm6a

Design and optimization of dual-threshold circuits for low-voltage low-power applications

L. Wei, Z. Chen, K. Roy, M.C. Johnson, Y. Ye, V.K. De
1999 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
In this paper, 1 we use the dual-threshold technique to reduce leakage power by assigning a high-threshold voltage to some transistors in noncritical paths, and using low-threshold transistors in critical  ...  A general leakage current model which has been verified by HSPICE simulations is used to estimate leakage power.  ...  Since April 1998, he has been a Principal Engineer and Manager of low-power circuit technology research at the Circuits Research Laboratory (CRL), Microprocessor Research Laboratories (MRL), Intel Corporation  ... 
doi:10.1109/92.748196 fatcat:rileg74qdbhwnbbkl5ynui434q

0.5- mu m 3.3-V BiCMOS standard cells with 32-kilobyte cache and ten-port register file

H. Hara, T. Sakurai, T. Nagamatsu, K. Seta, H. Momose, Y. Niitsu, H. Miyakawa, K. Matsuda, Y. Watanabe, F. Sano, A. Chiba
1992 IEEE Journal of Solid-State Circuits  
The performance of the BiCMOS macros is verified using a fabricated test chip.  ...  Several Bi-CMOS/CMOS circuits, such as a self-aligned threshold inverter (SATI) sense amplifier and an ECL HIT logic are used to realize high-speed operation at the low supply voltage.  ...  The NAND structure of the match line causes the match line of only the selected row to be activated and the corresponding SRAM word line to be enabled.  ... 
doi:10.1109/4.165339 fatcat:ty2jhb7avnha3jkvq4xovfjnhi

The heritage of Mead & Conway: What has remained the same, what has changed, what was missed, and what lies ahead [point of view]

Marco Casale-Rossi
2014 Proceedings of the IEEE  
Acknowledgment The author is grateful to Antun Domic: it all started with their conversations on the ''Design Challenges for the VLSI Chips.''  ...  During the organization of the DATE 2013 special session, the many Skype video calls with Lynn Conway were critical for the author to understand and appreciate what happened during the ''Mead & Conway  ...  A completely new way of creating VLSI systems on silicon was born.  ... 
doi:10.1109/jproc.2013.2295871 fatcat:rllejt2a7nau7fi4tbzxblodvy
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