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The Min-Max Voronoi Diagram of Polygons and Applications in VLSI Manufacturing [chapter]

Evanthia Papadopoulou, D.T. Lee
2002 Lecture Notes in Computer Science  
We study the min-max Voronoi diagram of a set S of polygonal objects, a generalization of Voronoi diagrams based on the maximum distance between a point and a polygon.  ...  As a byproduct we introduce the min-max hull which relates to the minmax Voronoi diagram in the way a convex hull relates to the ordinary Voronoi diagram.  ...  Our motivation for studying the min-max Voronoi diagram comes from an application in VLSI yield prediction, in particular the estimation of critical area, a measure reflecting the sensitivity of a VLSI  ... 
doi:10.1007/3-540-36136-7_45 fatcat:l2gjmnkoyfejxnjferkopkpb7q

L∞ Voronoi Diagrams and Applications to VLSI Layout and Manufacturing [chapter]

Evanthia Papadopoulou
1998 Lecture Notes in Computer Science  
In this paper we address the L∞ Voronoi diagram of polygonal objects and present applications in VLSI layout and manufacturing.  ...  Using the L∞ Voronoi diagram of polygons we address the problem of calculating the critical area for shorts in a VLSI layout.  ...  In this paper we present applications of Voronoi diagrams in VLSI layout and manufacturing.  ... 
doi:10.1007/3-540-49381-6_3 fatcat:fxayuc7ohnfslgupvs34rc6bmu

The L_infinity (L_1) Farthest Line-Segment Voronoi Diagram

Sandeep Kumar Dey, Evanthia Papadopoulou
2012 2012 Ninth International Symposium on Voronoi Diagrams in Science and Engineering  
well suited for VLSI applications.  ...  We introduce the farthest line-segment hull, a closed polygonal curve that characterizes the regions of the farthest line-segment Voronoi diagram, and is related to it similarly to the way an ordinary  ...  ACKNOWLEDGMENT We would like to thank Randolf Schärfig for a GPU implementation of the farthest line-segment Voronoi diagram that provided figures (Fig.1, and Fig.13) , Lucia Blondel for a CPU implementation  ... 
doi:10.1109/isvd.2012.27 dblp:conf/isvd/DeyP12 fatcat:guxmxeovrrcl3mzymijz47ly6m

The Hausdorff Voronoi Diagram of Point Clusters in the Plane

Evanthia Papadopoulou
2004 Algorithmica  
We study the Hausdorff Voronoi diagram of point clusters in the plane and derive a tight combinatorial bound on its structural complexity.  ...  Motivation for the investigation of this type of Voronoi diagram comes from the problem of computing the critical area of a VLSI Layout, a measure reflecting the sensitivity of the design to spot defects  ...  In [3] it was termed the Voronoi diagram of point clusters, in [1] the closest covered set diagram, and in [7, 9] the min-max Voronoi diagram.  ... 
doi:10.1007/s00453-004-1095-0 fatcat:srwocwmk4bhtdluhaszz4s7fpu

On the Hausdorff Voronoi Diagram of Point Clusters in the Plane [chapter]

Evanthia Papadopoulou
2003 Lecture Notes in Computer Science  
We study the Hausdorff Voronoi diagram of point clusters in the plane and derive a tight combinatorial bound on its structural complexity.  ...  Motivation for the investigation of this type of Voronoi diagram comes from the problem of computing the critical area of a VLSI Layout, a measure reflecting the sensitivity of the design to spot defects  ...  In [3] it was termed the Voronoi diagram of point clusters, in [1] the closest covered set diagram, and in [7, 9] the min-max Voronoi diagram.  ... 
doi:10.1007/978-3-540-45078-8_38 fatcat:ghvta5jlufchnpomxnvfed3opq

THE HAUSDORFF VORONOI DIAGRAM OF POLYGONAL OBJECTS: A DIVIDE AND CONQUER APPROACH

EVANTHIA PAPADOPOULOU, D. T. LEE
2004 International journal of computational geometry and applications  
The Hausdorff Voronoi diagram finds direct application in the problem of computing the critical area of a VLSI Layout, a measure reflecting the sensitivity of a VLSI design to random manufacturing defects  ...  Our motivation for studying the Hausdorff Voronoi diagram comes from an application in VLSI manufacturing, namely VLSI yield prediction, as explained in our companion paper. 13 The problem statement is  ...  The min-max Voronoi diagram was formulated to address the critical area computation problem for via-blocks in VLSI designs.  ... 
doi:10.1142/s0218195904001536 fatcat:jitnfhrk5ngupnuyl7bt7oxpsi

A Randomized Incremental Algorithm for the Hausdorff Voronoi Diagram of Non-crossing Clusters [article]

Panagiotis Cheilaris, Elena Khramtcova, Stefan Langerman, Evanthia Papadopoulou
2016 arXiv   pre-print
The diagram finds direct applications in VLSI computer-aided design.  ...  In the Hausdorff Voronoi diagram of a family of clusters of points in the plane, the distance between a point t and a cluster P is measured as the maximum distance between t and any point in P, and the  ...  Acknowledgements We thank an anonymous reviewer for valuable comments that helped improve the presentation of this paper.  ... 
arXiv:1312.3904v3 fatcat:m7okeyqfnzcj5c4wxtpuvjremy

Randomized incremental construction of the Hausdorff Voronoi diagram of non-crossing clusters [article]

Panagiotis Cheilaris, Elena Khramtcova, Evanthia Papadopoulou
2013 arXiv   pre-print
In the Hausdorff Voronoi diagram of a set of clusters of points in the plane, the distance between a point t and a cluster P is the maximum Euclidean distance between t and a point in P.  ...  This diagram has direct applications in VLSI design. We consider so-called "non-crossing" clusters.  ...  The "dual" max-min diagram is the Farthest Color Voronoi diagram [2, 13] .  ... 
arXiv:1306.5838v2 fatcat:hywesrznhzcgjhyrekugnpl2he

Computing the Map of Geometric Minimal Cuts [chapter]

Jinhui Xu, Lei Xu, Evanthia Papadopoulou
2009 Lecture Notes in Computer Science  
The MGMC problem is motivated by the critical area extraction problem in VLSI designs and finds applications in several other fields.  ...  the complexity of the Hausdorff Voronoi diagram.  ...  Acknowledgements The authors would like to thank three anonymous referees for their thoughtful comments and suggestions which significantly improve the presentation of the paper.  ... 
doi:10.1007/978-3-642-10631-6_26 fatcat:vnxxiwmpgvamvjfsrgszkxt7eu

Computing the Map of Geometric Minimal Cuts

Jinhui Xu, Lei Xu, Evanthia Papadopoulou
2012 Algorithmica  
The MGMC problem is motivated by the critical area extraction problem in VLSI designs and finds applications in several other fields.  ...  the complexity of the Hausdorff Voronoi diagram.  ...  Acknowledgements The authors would like to thank three anonymous referees for their thoughtful comments and suggestions which significantly improve the presentation of the paper.  ... 
doi:10.1007/s00453-012-9704-9 fatcat:2dkqlueigbeh5cskaatf56fnv4

Continuous location of dimensional structures

J.M. Dı́az-Báñez, J.A. Mesa, A. Schöbel
2004 European Journal of Operational Research  
of the nearest-point (farthestpoint) Voronoi diagram.  ...  Generally, this kind of path appears in problems involving transportation routing design with applications such as oor planning, manufacturing environment design, VLSI layout design, robot moving, etc.  ... 
doi:10.1016/s0377-2217(02)00647-1 fatcat:i3u2r5g37nh7vf3w6hposddz34

Efficient Max-Norm Distance Computation and Reliable Voxelization [article]

Gokul Varadhan, Shankar Krishnan, Young J. Kim, Suhas Diggavi, Dinesh Manocha
2003 Symposium on geometry processing : [proceedings]. Symposium on Geometry Processing  
We present techniques to efficiently compute the distance under max-norm between a point and a wide class of geometric primitives.  ...  of solids and generate adaptive distance fields that provides a Hausdorff distance guarantee between the boundary of the original primitives and the reconstructed surface.  ...  We thank Kenny Hoff for his HAVOC software, Joe Warren and Scott Schaefer for providing us with dual contouring code, and the reviewers for their feedback and suggestions.  ... 
doi:10.2312/sgp/sgp03/116-126 fatcat:pk52og4wovcjpgmw2yyncjtopi

Optimal Facility Location under Various Distance Functions [chapter]

Sergei Bespamyatnikh, Klara Kedem, Michael Segal
1999 Lecture Notes in Computer Science  
In the rst we seek a location that maximizes a weighted distance function between the facility and the sites, and in the second we nd a location that minimizes the sum (or sum of the squares) of the distances  ...  We present ecient algorithms for two problems of facility location. In both problems we want to determine the location of a single facility with respect to n given sites.  ...  Some applications for this problem are locating a component in a VLSI chip or locating a welding robot in an automobile manufacturing plant.  ... 
doi:10.1007/3-540-48447-7_32 fatcat:zmgj72noq5h4viq5wzjoxnmzve

Rectangular Partitions of a Rectilinear Polygon [article]

Hwi Kim, Jaegun Lee, Hee-Kap Ahn
2021 arXiv   pre-print
We investigate the problem of partitioning a rectilinear polygon P with n vertices and no holes segments drawn inside P under two optimality criteria.  ...  In the minimum ink partition, the total length of the line segments drawn inside P is minimized. We present an O(n^3)-time algorithm using O(n^2) space that returns a minimum ink partition of P.  ...  There are various applications in chip manufacturing [19] , geoinformatics [23] , and pattern recognition [1, 27] .  ... 
arXiv:2111.01970v1 fatcat:hqwb4tbicfhvrhr5qp5746srci

A Survey on Steiner Tree Construction and Global Routing for VLSI Design

Hao Tang, Genggeng Liu, Xiaohua Chen, Naixue Xiong
2020 IEEE Access  
Steiner tree construction is one of the basic models of VLSI physical design, which is usually used in the initial topology creation for noncritical nets in physical design.  ...  Global Routing (GR) is a crucial and complex stage in the Very Large-Scale Integration (VLSI) design, which minimizes interconnect wirelength and delay to optimize the overall chip performance.  ...  [165] proposed a new model based on the min-max resource sharing framework.  ... 
doi:10.1109/access.2020.2986138 fatcat:nqpdbybucjembl4iztn67l4fgi
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