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The inherent queuing delay of parallel packet switches

Hagit Attiya, David Hay
2004 Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures - SPAA '04  
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches.  ...  This paper investigates the inherent queuing delay and delay jitter introduced by the PPS's demultiplexing algorithm, relative to an optimal work-conserving switch.  ...  Proof: We compare the queuing delay of the cells in the PPS and in the reference switch.  ... 
doi:10.1145/1007912.1007954 dblp:conf/spaa/AttiyaH04 fatcat:uzu7hnbczjahpd7uysjv2b6hl4

The Inherent Queuing Delay of Parallel Packet Switches [chapter]

Hagit Attiya, David Hay
IFIP International Federation for Information Processing  
The parallel packet switch (PPS) is extensively used as the core of contemporary commercial switches.  ...  We show that the inherent queuing delay and delay jitter of a symmetric and fault-tolerant N × N PPS, where every demultiplexing algorithm dispatches cells to all the middle-stage switches is if there  ...  Discussion This paper studies the worst-case queuing delay and delay jitter induced by the demultiplexing algorithm of a parallel packet switch, relative to an optimal work-conserving switch.  ... 
doi:10.1007/1-4020-8141-3_13 dblp:conf/ifipTCS/AttiyaH04 fatcat:7umnq7d3xndy3fehdr3efpvcne

Packet scheduling in next-generation multiterabit networks

I. Elhanany, M. Kahane, D. Sadot
2001 Computer  
Although more difficult to implement, this scheme yields lower packet delay at the expense of longer switching intervals.  ...  average packet delay.  ... 
doi:10.1109/2.917548 fatcat:2476xmhyurhuhjkj6mqfubtbr4

GMDS

R. Arteaga, F. Tobajas, R. Esper-Chain, V. de Armas, Roberto Sarmiento
2008 Proceedings of the conference on Design, automation and test in Europe - DATE '08  
This switch is named GMDS (Gigabit MultiDrop Switch) and its main features are the switch matrix replacement by the multidrop backplane -increasing system reliability-, variable lenght packet switching  ...  support -avoiding bandwidth efficient loss-, multiple output queuing structure for supporting QoS (Quality of Service) and a minimum speedup. 1  ...  The Y axis represents the Mean Queuing Delay in packets which includes the switch matrix delay and the queuing delay. This parameter does not include transmission time on the output link.  ... 
doi:10.1145/1403375.1403725 fatcat:uulqbk4fkfatpjovx6lvmpjhwa

FIFO based multicast scheduling algorithm for VOQ packet switches

D. Pan, Y. Yang
2004 International Conference on Parallel Processing, 2004. ICPP 2004.  
While the speedup requirement makes the output queued switch difficult to scale, the single input queued switch suffers from the head of line (HOL) blocking, which severely limits the network throughput  ...  In this paper, we give a novel queue structure for the input buffers of a VOQ multicast switch by separately storing the address information and data information of a packet, so that an input port only  ...  In general, packet switches can be divided into two broad categories: output queued (OQ) switches and input queued (IQ) switches, based on where the blocked packets are queued at the switch.  ... 
doi:10.1109/icpp.2004.1327938 dblp:conf/icpp/PanY04 fatcat:gr7p4arhynbrpbbp63yomcyoja

Performance evaluation of a hybrid OBS/OCS network with QoS differentiation based on packet loss/delay requirements

Jordi Perello, Nuria de Guinea, Salvatore Spadaro, Gabriel Junyent, Jaume Comellas
2010 2010 12th International Conference on Transparent Optical Networks  
Once assembled, those departing delay or losssensitive bursts are sent to the destination over a parallel all-optical hybrid network, where a set of switch ports and wavelengths are dedicated to delay-sensitive  ...  Depending on their QoS requirements, incoming IP packets are collected in delay-sensitive or loss-sensitive assembly queues.  ...  ACKNOWLEDGEMENTS The work reported in this paper has been partially supported by the Spanish Science Ministry through Project "Engineering Next Generation Optical Transport Networks (ENGINE)", (TEC2008  ... 
doi:10.1109/icton.2010.5549287 fatcat:ksd6uw4gknb3pjyqamyse4voti

FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches

Deng Pan, Yuanyuan Yang
2005 IEEE transactions on computers  
While the speedup requirement makes the output queued switch difficult to scale, the single input queued switch suffers from head of line (HOL) blocking, which severely limits the network throughput.  ...  In this paper, we give a novel queue structure for the input buffers of a multicast VOQ switch by separately storing the address information and data information of a packet so that an input port only  ...  ACKNOWLEDGMENTS This research was supported in part by the US National Science Foundation under grant numbers CCR-0073085, CCR-0207999, and ECS-0427345.  ... 
doi:10.1109/tc.2005.164 fatcat:n742dtj5jfblnfrjdrzmvsivai

Efficient Variable Length Block Switching Mechanism

Jaidhar C.D., A.V Reddy
2007 International Journal of Computers Communications & Control  
(c) Packet is eligible to transfer from CB to output only when the entire packet arrives at the CB, which increases the latency of the fragmented packet in the switch.  ...  When number of ports are more, existence of such a switch is infeasible, due to the restricted memory available in switch core. (b) Reassembly circuit at each crosspoint adds the cost of the switch.  ...  Mean delay of Block transfer mechanism is higher for larger packets than Output Queued switch. However, it shows smaller average delay for small packets.  ... 
doi:10.15837/ijccc.2007.3.2359 fatcat:gl7rdpgndjbjhpwvdrphgrd4qe

Scalable high-speed switches/routers with QoS support [Guest Editorial]

M. Hamdi, N. McKeown
2000 IEEE Communications Magazine  
It shows how the IP QoS can be mapped onto the inherent QoS capabilities of the corc ATM switch.  ...  First, to keep pace with the growth in Internet usage, we need higher capacity packet switches with aggregate data rates of multiple terabits per second and forwarding ratcs of hillions of packets per  ...  It shows how the IP QoS can be mapped onto the inherent QoS capabilities of the corc ATM switch.  ... 
doi:10.1109/mcom.2000.888258 fatcat:lg2dre4q3vhjxfhvp5tndhexmi

The Crosspoint-Queued Switch

Y. Kanizo, D. Hay, I. Keslassy
2009 IEEE INFOCOM 2009 - The 28th Conference on Computer Communications  
Furthermore, we study the performance of the switch for larger buffer sizes and show that it nearly behaves as an ideal output-queued switch.  ...  This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards.  ...  ACKNOWLEDGMENT This work was partly supported by the European Research Council Starting Grant n • 210389, the Alon Fellowship, the ATS-WD Career Development Chair, and the Loewengart Research Fund.  ... 
doi:10.1109/infcom.2009.5061981 dblp:conf/infocom/KanizoHK09 fatcat:6xv3zck4yrhr3bdqkcepo6akky

Lookahead Forward Shift Optical Packet Switch

Stephen Suryaputra, Joseph D. Touch, Joseph A. Bannister
2010 2010 INFOCOM IEEE Conference on Computer Communications Workshops  
The switch supports variable length packets, and achieves performance similar to electronic virtual output queued switching, using four packets's worth of variable-speed shift-forward delay for a 1 Gbps  ...  This paper explains an optical buffer called lookahead forward shift buffer and its application to an optical packet switch.  ...  By delaying all packets our switch can examine beyond the head of the line. As a result, the switch can decide to take packets from the buffer to line them up contention free.  ... 
doi:10.1109/infcomw.2010.5466654 fatcat:pfsp6ilnwrdmle7w2yb56wm45m

Fabric on a Chip: Towards Consolidating Packet Switching Functions on Silicon

Brad Matthews, Itamar Elhanany, Vahid Tabatabaee
2006 2006 IEEE International Conference on Communications  
To resolve the high memory bandwidth requirements presented by output-queued switches, several parallel shared-memory architectures have been previously proposed.  ...  In taking advantage of recent advancements in integrated circuit technologies, FoC aims to facilitate the consolidation of as many packet switching functions as possible on a single chip.  ...  INTRODUCTION Output queued (OQ) switches offer several highly desirable performance characteristics, including minimal average packet delay, controllable Quality of Service (QoS) provisioning, and work-conservation  ... 
doi:10.1109/icc.2006.254713 dblp:conf/icc/MatthewsET06 fatcat:rfnujejnqbajtafq57aabchwe4

Bandwidth-Adaptive Scheduling for Quality of Service Enhancement of Real-Time Multimedia Applications in Network Processor Based Router

R. Avudaiamma, P. Seethalaks
2009 Journal of Computer Science  
The reduction in average queuing delay is about 30% compared to SRR for all the types of traffic.  ...  The results showed that BASRR is efficient with per packet complexity of O(1) and provides better fairness and reduced delay.  ...  The packets are injected through Media switch Fabric Interface and Receive Buffer (RBUF) reassemble incoming mpackets (packets with length 64 bytes) 1 : 1 Comparative queuing delays Average queuing delay  ... 
doi:10.3844/jcssp.2009.1068.1074 fatcat:dozs5ockmzhfdg2wmdfo7y3fmi

Cognitive radio MAC protocol for WLAN

Qi Zhang, Frank H.P. Fitzek, Villy B. Iversen
2008 2008 IEEE 19th International Symposium on Personal, Indoor and Mobile Radio Communications  
We develop and implement the simulation of C-CSMA/CA by OPNET. The simulation results show that C-CSMA/CA highly enhances throughput and reduces the queuing delay and media access delay.  ...  C-CSMA/CA ef ciently exploits the inherent characteristics of CSMA/CA to design distributed cooperative outband sensing to explore spectrum hole; moreover, it designs dual inband sensing scheme to detect  ...  The de nition of queuing delay is the time that from a packet arrival until the beginning of a transmission attempt for the packet.  ... 
doi:10.1109/pimrc.2008.4699678 dblp:conf/pimrc/ZhangFI08 fatcat:zhph5m3hunhkbbc3jjvpgfncre

Tales of the Tail

Jialin Li, Naveen Kr. Sharma, Dan R. K. Ports, Steven D. Gribble
2014 Proceedings of the ACM Symposium on Cloud Computing - SOCC '14  
Interactive services often have large-scale parallel implementations. To deliver fast responses, the median and tail latencies of a service's components must be low.  ...  We model these network services as a queuing system in order to establish the best-achievable latency distribution.  ...  We thank the members of the UW systems research group for many insightful and lively discussions, including Katelin Bailey, Peter Hornyack, Adriana Szekeres, Irene Zhang, Luis Ceze, and Hank Levy.  ... 
doi:10.1145/2670979.2670988 dblp:conf/cloud/LiSPG14 fatcat:56cac52pqjebbbbqhmrnr3dbrm
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