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The impact of data transfer and buffering alternatives on network interface design

S.S. Mukherjee, M.D. Hill
Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture  
The relative importance of these parameters depends both on the specific NI design and the characteristics of the application.  ...  We evaluate seven memory bus NIs that we believe capture the essential components of the design space exposed by these data transfer and buffering parameters.  ...  various commercial and experimental networks and net work interfaces.  ... 
doi:10.1109/hpca.1998.650560 dblp:conf/hpca/MukherjeeH98 fatcat:3krxvdvzbfacboq3757nzna5wy

MPI-IO on DAFs over VIA: implementation and performance evaluation

Jiesheng Wu, D.K. Panda
2002 Proceedings 16th International Parallel and Distributed Processing Symposium  
We identify one of the main mismatches between MPI-IO and DAFS is memory management. Three different design alternatives for memory management are proposed, implemented, and evaluated.  ...  For the other case of Inline data transfer, it may hurt performance.  ...  Acknowledgments We would like to thank Duke DAFS team for giving us the latest version of DAFS implementation and Richard Kisley for providing us with insights into their implementation.  ... 
doi:10.1109/ipdps.2002.1016566 dblp:conf/ipps/WuP02 fatcat:at7gbonjdbdwjnumtz3bbaxrie

Data base processor technology

Donald R. Anderson
1976 Proceedings of the June 7-10, 1976, national computer conference and exposition on - AFIPS '76  
The technology that supports the dedicated data base processor concept, system architectural considerations, the application of the concept to both distributed and centralized systems, and areas of needed  ...  The ability to achieve significant amounts of mass memory has not been matched with a capability for processing data stored within the mass memory.  ...  its internal storage in operating on the data base information. "5" The as transfers data between the DBP Buffer and the System Buffer.  ... 
doi:10.1145/1499799.1499910 dblp:conf/afips/Anderson76 fatcat:o4hgvd6bpfb3lefawof7ns3lci

High Performance Block I/O for Global File System (GFS) with InfiniBand RDMA

Shuang Liang, Weikuan Yu, Dhabaleswar K. Panda
2006 2006 International Conference on Parallel Processing (ICPP'06)  
The evaluation quantifies the redundant copy impact for both bulk data transfer and file system meta-data operations.  ...  State-of-the-art network technology has evolved to 10Gbps.  ...  As the speed of network communication approaches current memory bandwidth, the impact of RDMA and zero copy on block I/O is not clear yet.  ... 
doi:10.1109/icpp.2006.47 dblp:conf/icpp/LiangYP06 fatcat:nyxne57ptbdvfi7jlt4dmhqq4y

Implementing protected multi-user communication for Myrinet [chapter]

Shailabh Nagar, Dale Seed, Anand Sivasubramaniam
1998 Lecture Notes in Computer Science  
With the advent of high-performance networks such as ATM and Myrinet, the physical network is no longer the communication bottleneck. Rather, the major overhead can now be attributed to software.  ...  This paper presents a description of the design, implementation and performance of a protected user-level messaging system over Myrinet, called MU-Net, that can handle multiple application processes concurrently  ...  Second, the interface to the network should provide an efficient way of transferring data between the memory on the workstation and the network.  ... 
doi:10.1007/bfb0052205 fatcat:b4oilctusrbhflyg3ffx3ycope

Cluster communication protocols for parallel-programming systems

Kees Verstoep, Raoul A. F. Bhoedjang, Tim Rühl, Henri E. Bal, Rutger F. H. Hofman
2004 ACM Transactions on Computer Systems  
Also, we investigate the effects of alternative data-transfer methods and multicast implementations, and we evaluate the influence of packet size.  ...  We show how moving protocol tasks to a relatively slow network interface can yield both performance advantages and disadvantages, depending on specific characteristics of the application and the underlying  ...  We thank Frans Kaashoek, Thilo Kielmann and the anonymous referees for their useful comments on this article.  ... 
doi:10.1145/1012268.1012269 fatcat:gpdnffvfxjfyniuopeg7z5v2lq

Understanding PCIe performance for end host networking

Rolf Neugebauer, Gianni Antichi, José Fernando Zazo, Yury Audzevich, Sergio López-Buedo, Andrew W. Moore
2018 Proceedings of the 2018 Conference of the ACM Special Interest Group on Data Communication - SIGCOMM '18  
However, implementing custom designs on programmable NICs is not easy: many potential bottlenecks can impact performance.  ...  In recent years, spurred on by the development and availability of programmable NICs, end hosts have increasingly become the enforcement point for core network functions such as load balancing, congestion  ...  Acknowledgments.This research is (in part) supported by the UK's Engineering and Physical Sciences Research Council (EPSRC) under the EARL project (EP/P025374/1) and the European H2020 projects dReDBox  ... 
doi:10.1145/3230543.3230560 dblp:conf/sigcomm/NeugebauerAZAL018 fatcat:buf6rbn4gbgoneddg2rja67tli

Analysis of performance improvements for host and GPU interface of the APENet+ 3D Torus network

R Ammendola A, A Biagioni, O Frezza, F Lo Cicero, A Lonardo, P S Paolucci, D Rossetti, F Simula, L Tosoratto, P Vicini
2014 Journal of Physics, Conference Series  
In this paper we describe the APEnet+ architecture, detailing the hardware implementation and discuss the impact of such RDMA specialized hardware on host interface latency and bandwidth.  ...  of Fermi and Kepler-class NVIDIA GPUs to obtain real zero-copy, GPU-to-GPU low latency transfers.  ...  Acknowledgments This work was partially supported by the EU Framework Programme 7 project EURETILE under grant number 247846.  ... 
doi:10.1088/1742-6596/523/1/012013 fatcat:ldbp7itmqrgbvpn2jqbwukbvji

The impact of a zero-scan Internet checksumming mechanism

Gregory G. Finn, Steve Hotz, Rod Van Meter
1996 Computer communication review  
These alternative interface designs are discussed, along with their requirements and effects upon operating system and computer system architectures. .  ...  Taken one step further, the network interface could be integrated with the CPU to create an "internet microprocessor".  ...  Acknowledgments The authors would like to thank Mike Carlton, Ted Faber, Jon Postel, and Craig Milo Rogers for their constructive comments on previous versions of this paper.  ... 
doi:10.1145/242896.242898 fatcat:ovzxrhaicffxdech7t2je2zcoq

Supporting efficient noncontiguous access in PVFS over Infiniband

Jiseheng Wu, Wyckoff, Panda
2003 Proceedings IEEE International Conference on Cluster Computing CLUSTR-03  
In this paper, we address noncontiguous data transmission between the client and the I/O server in cluster file systems over a high performance network.  ...  We have designed and incorporated this approach in a version of PVFS over InfiniBand.  ...  Acknowledgments We would like to thank the PVFS team at Argonne National Laboratory and Clemson University for giving us access to the latest versions of PVFS and for providing us with crucial insights  ... 
doi:10.1109/clustr.2003.1253333 dblp:conf/cluster/WuWP03 fatcat:zesr2ucmyban7e3fmo6jegahqy

Architectural considerations for CPU and network interface integration

C.D. Cranor, R. Gopalakrishnan, P.Z. Onufryk
2000 IEEE Micro  
The integration of processing and networking into the same device offers an opportunity to rethink the way the CPU and network interface interact.  ...  The popularity of the Internet and the emergence of broadband access networks is fueling the development of communications processors -devices that integrate processing, networking, and system functions  ...  Diversity in network interface requirements has the greatest impact on DMA design.  ... 
doi:10.1109/40.820048 fatcat:uilusghauvgudfb5gejpeckxki

Design choices in the SHRIMP system

Matthias A. Blumrich, Margaret Martonosi, Robert A. Shillner, Richard D. Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li
1998 SIGARCH Computer Architecture News  
We evaluate signi cant design choices by modifying the network interface rmware and the system software in order to empirically compare our design to other approaches.  ...  The SHRIMP cluster-computing system has progressed to a point of relative maturity; a variety of applications are running on a 16-node system.  ...  Malena Mesarina designed an experimental version of the network interface, and David Oppenheimer contributed with system programming and testing.  ... 
doi:10.1145/279361.279402 fatcat:gpeiabkhezayfp5mi3fyr2pdsu

Limits to low-latency communication on high-speed networks

Chandramohan A. Thekkath, Henry M. Levy
1993 ACM Transactions on Computer Systems  
The con- troller is able to overlap the data transfer over the bus with the transfer on the network.  ...  The most likely cause is an underestimate of the amount of overlap between the host memory-FIFO data transfers and the FIFO-network transfer. 2.3.1 Throughput and Latency.  ... 
doi:10.1145/151244.151247 fatcat:jt4lrmf7xrgt7eyjghunfvotim

Network-on-chip architectures and design methods

L. Benini, D. Bertozzi
2005 IEE Proceedings - Computers and digital Techniques  
In the long run, more aggressive solutions are needed to overcome the scalability limitation, and networks-on-chip (NoCs) are currently viewed as a 'revolutionary' approach to provide a scalable, high  ...  Designers have to accommodate the communication needs of an increasing number of integrated cores while preserving overall system performance under tight power budgets.  ...  Acknowledgments The authors acknowledge the contribution of a large group of coworkers which has made it possible to write this work.  ... 
doi:10.1049/ip-cdt:20045100 fatcat:y4mpq4dhvfe7tk3t4chf5j7se4

User-Space Communication: A Quantitative Study

S. Araki, A. Bilas, C. Dubnicki, J. Edler, K. Konishi, J. Philbin
1998 Proceedings of the IEEE/ACM SC98 Conference  
Bandwidth, however, depends primarily on how data is transferred between host memory and the network.  ...  The highest bandwidth, between 95 and 125 MBytes/s for long message transfers, is delivered by libraries that use DMA on both send and receive sides and avoid all data copies.  ...  Acknowledgements We would like to thank Bob Felderman for his help with the Myrinet network, Scott Pakin for his help in porting FM to Linux, and Hiroshi Tezuka and Yutaka Ishikawa for their help with  ... 
doi:10.1109/sc.1998.10038 dblp:conf/sc/ArakiBDEKP98 fatcat:go37rko7urgydo3twmsthm44dq
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