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Stepwise Transformation of Algorithms into Array Processor Architectures by the DECOMP

Uwe Vehlies
1995 VLSI design (Print)  
The transformation itself is divided into manageable design steps and implemented in the CAD-tool DECOMP which allows the exploration of different architectures in a short time.  ...  A formal approach for the transformation of computation intensive digital signal processing algorithms into suitable array processor architectures is presented.  ...  Acknowledgment This work has been supported by the Fraunhofer Gesellschaft contract number T/RF33/K0011 / K1311.  ... 
doi:10.1155/1995/76861 fatcat:bmzem22sdjaf5mfaigfchdnahu

Array languages and theN-body problem

P. Cockshott, Y. Gdura, P. Keir
2013 Concurrency and Computation  
Our group is part of the Computer Vision and Graphics research group and we have for some years been developing array compilers because we think these are a good tool both for expressing graphics algorithms  ...  dierent, processor architectures we used.  ...  The primary motivation of the language design was to create a Fortran-based language for education, however F is a perfectly adequate general-purpose language.  ... 
doi:10.1002/cpe.3088 fatcat:um2yz2l32bb5pnc6sl6csufnsu

Kronos: Processor Family for High-Level Languages [chapter]

Dmitry N. Kuznetsov, Alexey E. Nedorya, Eugene V. Tarassov, Vladimir E. Philippov, Marina Ya Philippova
2011 IFIP Advances in Information and Communication Technology  
The article contains a short review of the original multiuser multitask operation system, Excelsior, that was designed and implemented within the project and used for the Kronos family processors.  ...  The basic principles of highlevel languages oriented architecture design are presented by the example of the Kronos processors family architecture.  ...  The Kronos processors architecture was designed to support highlevel programming languages (C, Modula-2, Oberon, Pascal, Occam, etc.) that allowed implementing the newest ideas in software development  ... 
doi:10.1007/978-3-642-22816-2_32 fatcat:dlvbewnovrgavg6rwbi5noq5aa

Compared anatomy of the programming languages Pascal and C

V Hayward
1986 SIGPLAN notices  
For PAS-CAL, the system interface is implemented via functions built in the language and is therefore not extensible by the user.  ...  C compilers include a macro processor, and the program verifier is a separate tool.  ...  Introduction Introduction A detailed comparison of the programming languages PASCAL and C can be helpful when it comes to deciding of the implementation language of a large project because the two languages  ... 
doi:10.1145/14947.14950 fatcat:hakpvipiz5b47hua4bk2yvnusy

Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing

Zain-ul-Abdin, Bertil Svensson
2009 Microprocessors and microsystems  
systems, the architectures of reconfigurable devices have evolved to coarse-grained compositions of functional units or program controlled processors, which are operated in a coordinated manner to improve  ...  We classify the coarse-grained reconfigurable architectures into four categories and present some of the existing examples of these categories.  ...  Veronica Gaspes, Jerker Bengtsson, Andreas Persson, and Prof. Dan Hammerstrom) for their valuable feedback during the internal review of the paper.  ... 
doi:10.1016/j.micpro.2008.10.003 fatcat:k4c63f4k2zbc5a4mfr3vfwqkfe

Abstract machines for programming language implementation

Stephan Diehl, Pieter Hartel, Peter Sestoft
2000 Future generations computer systems  
Abstract machines provide an intermediate language stage for compilation. They bridge the gap between the high level of a programming language and the low level of a real machine.  ...  We conclude that whilst a large number of efficient abstract machines have been designed for particular language implementations, relatively little work has been done to design abstract machines in a systematic  ...  Acknowledgements We thank David Barron, Hugh Glaser, Brian Kernighan, John Ousterhout, Guido van Rossum and Reinhard Wilhelm for their help with our research.  ... 
doi:10.1016/s0167-739x(99)00088-6 fatcat:qx6mlakihzecvlaiorgzuwdzxi

The BLAZE language: a parallel language for scientific programming

1987 Microprocessors and microsystems  
A central goal in the design of Blaze is portability across a broad range of parallel architectures.  ...  Programming multiprocessor parallel architectures is a complex task. This paper describes a Pascal-like scientific programming language, Blaze, designed to simplify this task.  ...  In most respects its implementation is similar to that of Pascal, C, and similar languages supporting static type checking and stack based run-time environments, though there are important differences.  ... 
doi:10.1016/0141-9331(87)90448-0 fatcat:5q3bdzsvgreonkh6btubiuha3u

Compiling Vector Pascal to the XeonPhi

Mozhgan Chimeh, Paul Cockshott, Susanne B. Oehler, Ashkan Tousimojarad, Tian Xu
2015 Concurrency and Computation  
Intel's Xeon Phi is a highly parallel x86 architecture chip made by Intel. It has a number of novel features which make it a particularly challenging target for the compiler writer.  ...  This paper describes the techniques used to port the Glasgow Vector Pascal Compiler (VPC) to this architecture and assess its performance by comparisons of the Xeon Phi with 3 other machines running the  ...  ACKNOWLEDGEMENTS We wish to express our gratitude for the sponsoring of our work by the FP7 Frame Work.  ... 
doi:10.1002/cpe.3509 fatcat:tmrqltlfprhcdkso7vxp7pxx7e

Scientific Programming in Fortran

W. Van Snyder
2007 Scientific Programming  
ANSI (ASA at the time) developed a standard, largely based on IBM's Fortran IV in 1966. Revisions of the standard were produced in 1977, 1990, 1995 and 2003.  ...  The Fortran programming language was designed by John Backus and his colleagues at IBM to reduce the cost of programming scientific applications.  ...  The justifications were that array processing is a central necessity for scientific computing, and the language features Wilson proposed matched the contemporary architecture of supercomputers.  ... 
doi:10.1155/2007/930816 fatcat:lvbuboy5vbfw7cujnwaqlkmjtu


R. N. Ibbett, P. C. Capon, N. P. Topham
1985 SIGARCH Computer Architecture News  
Programming language features have been designed to exploit this configuration and an example algorithm is presented.  ...  MU6V is a parallel vector processing system in which a linear set of processors, each capable of both vector and scalar operations, is interconnected by a common communication highway.  ...  Straightforward extensions can be made to (i:row; arow:slice, x,b:vector, N:dim) a Pascal-like language in which array names or slices of arrays appear as repeat operands in array operations.  ... 
doi:10.1145/327070.327145 fatcat:buzyplpmtrcavbk77hvwh2abjm

Towards DBMSs for Supporting New Applications

Serge Abiteboul, Michel Scholl, Georges Gardarin, Eric Simon
1986 Very Large Data Bases Conference  
The third interface, V-Pascal, is a Pascal extension which combines the advantages of the Verso systern, and that of the Pascal programming language.  ...  For the time being, it includes a flexible non-procedural language (called FABRE) which is a super-set of both QUEL and SQL, a query by form and example language (called UQBE) and a pre-compiled PASCAL  ... 
dblp:conf/vldb/AbiteboulSGS86 fatcat:jvmblgnxfnbu5exe6zo5htbm34

Mach and Matchmaker: kernel and language support for object-oriented distributed systems

Michael B. Jones, Richard F. Rashid
1986 Conference proceedings on Object-oriented programming systems, languages and applications - OOPLSA '86  
Mach, a multiprocessor operating system kernel providing capability-based interprocess communication, and Matchmaker, a language for specifying and automating the generation of multi-lingual interprocess  ...  Comparisons are made between the Mach/Matchmakcr environment and other related systems. Possible future directions are examined:  ...  Acknowledgments Mach was the brainchild of many including Avie Tevanian, Mike Young, Bob Baron, and Rick Rashid. David Golub and Bill Bolosky are also working on the implementation.  ... 
doi:10.1145/28697.28705 dblp:conf/oopsla/JonesR86 fatcat:ldyykihal5hrrf627w4qqdlzym

Occam-pi for Programming of Massively Parallel Reconfigurable Architectures

Zain-ul-Abdin, Bertil Svensson
2012 International Journal of Reconfigurable Computing  
To evaluate the programming approach, a compiler framework was extended to support the language extensions in the occam-pi language and a backend was developed to target the Ambric array of processors.  ...  We present two case-studies; DCT implementation exploiting the reconfigurability feature of occam-pi and a significantly large autofocus criterion calculation based on the dynamic parallelism capability  ...  This research is part of the CERES research program funded by the Knowledge Foundation and the ELLIIT strategic research initiative funded by the Swedish government.  ... 
doi:10.1155/2012/504815 fatcat:6w6ntkbuabccdmfvnqcd6bzilm

HCL: A language for low-level image analysis

Joseph J. Pfeiffer
1990 Journal of Parallel and Distributed Computing  
Several of the features of the language, and much of its generality past a narrow "PCLIP II language," are a direct result of their responses to an early version of the paper.  ...  ACKNOWLEDGMENTS The reviewers were exceptionally helpful.  ...  Some of these languages include Actus for ILLIAC IV [ 91, Parallel Pascal for the Massively Parallel Processor [ 121, and Vector C for the Cyber 205 [ 71.  ... 
doi:10.1016/0743-7315(90)90098-a fatcat:cb2maiocszaqnfszljo6rhhxri

Synthesis, structure and power of systolic computations

Jozef Gruska
1990 Theoretical Computer Science  
This machine consists of a linear array of programmable processors that have been designed in such a way that the whole array can implement efficiently various systolic systems especially for vision and  ...  It is very appeaiing from the design point of view, because it is based on repetiiions of simple processors, and on regularity, modularity and simplicity of interconnections.  ...  It often happens that it is easier to design an algorithm for implementation on a particular architecture (e.g. on two-directional cellular rings), than on a slightly different architecture (on one-directional  ... 
doi:10.1016/0304-3975(90)90190-s fatcat:sztlpeed4jhcdojkzi5z5zyska
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