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Design for Verification of the PCI-X Bus

Haja Moinudeen, Ali Habibi, Sofiene Tahar
2006 2006 Formal Methods in Computer Aided Design  
In this paper, we provide a design for verification approach of a PCI-X bus model, which is the fastest and latest extension of PCI technologies.  ...  We integrate the verification within the design phases where we use model checking and model based testing, respectively at the AsmL and SystemC levels.  ...  We presented a design for verification approach applied on the latest high speed PCI-X standard bus.  ... 
doi:10.1109/fmcad.2006.11 dblp:conf/fmcad/MoinudeenHT06 fatcat:p3qx2hh2o5eobhna6ai6gz46nm

Principles of Sequential-Equivalence Verification

M.N. Mneimneh, K.A. Sakallah
2005 IEEE Design & Test of Computers  
Because of the sheer size of such implementations, applying software verification to check their correctness is currently beyond the scope of most tools.  ...  In an automatic translation, synthesis tools transform the RTL model into a gate-level model.  ...  Thus, we start with the set of unsafe states and add their predecessors by backward FSM traversal until we reach a fixed point.  ... 
doi:10.1109/mdt.2005.68 fatcat:45vq4s6yizhfnbksngnvhfaiwq

Structural FSM Traversal

D. Stoffel, M. Wedler, P. Warkentin, W. Kunz
2004 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The key ingredient to a state-space traversal is a data structure to represent state sets. In structural FSM, traversal-state sets are represented noncanonically and implicitly as gate netlists.  ...  Finally, we give details on the implementation of a sequential equivalence checker and present experimental results that demonstrate the effectiveness of the proposed approach for equivalence checking  ...  The work of [22] combines the previous approaches [12] , [21] with local BDD-based verification techniques and extensions to backward justification to improve the overall framework.  ... 
doi:10.1109/tcad.2004.826552 fatcat:sx6ouhriindi3pfcvehxnmd3hi

Activity-based refinement for abstraction-guided simulation

Debapriya Chatterjee, Valeria Bertacco
2009 2009 IEEE International High Level Design Validation and Test Workshop  
Unfortunately, so far, the quality of the abstraction has been the weakest link in this semi-formal solution, because of its impact in enabling a simulator to reach a verification goal.  ...  Semi-formal verification tools are gaining popularity because of their ability to balance the performance of logic simulators with the goal-focused capabilities of formal verification.  ...  Then, this engine performs backward reachability analysis [8] on this FSM, thus classifying each state in the abstraction based on their distance to the goal state.  ... 
doi:10.1109/hldvt.2009.5340163 dblp:conf/hldvt/ChatterjeeB09 fatcat:ywxxadzgmze7vpjqvfokxii3tm

Distance-Guided Hybrid Verification with GUIDO

S. Shyam, V. Bertacco
2006 Proceedings of the Design Automation & Test in Europe Conference  
In this paper we present Guido, a hybrid verification software that uses formal verification techniques to guide the simulation towards a verification goal.  ...  Guido is novel in that 1) it guides the simulation by means of a distance function derived from the circuit structure, and 2) it has a trace sequence controller that monitors and controls the direction  ...  This work proposes to direct a random simulator to hit a goal by enlarging a verification target through backward traversal, so that it is sufficient for the simulator to hit any of the states in the enlarged  ... 
doi:10.1109/date.2006.244050 dblp:conf/date/ShyamB06 fatcat:ypwekabajvdqfec3vky72g6fgm

Distance-Guided Hybrid Verification with GUIDO

Valeria Bertacco
2006 High Level Design Validation and Test Workshop (HLDVT), IEEE International  
In this paper we present Guido, a hybrid verification software that uses formal verification techniques to guide the simulation towards a verification goal.  ...  Guido is novel in that 1) it guides the simulation by means of a distance function derived from the circuit structure, and 2) it has a trace sequence controller that monitors and controls the direction  ...  This work proposes to direct a random simulator to hit a goal by enlarging a verification target through backward traversal, so that it is sufficient for the simulator to hit any of the states in the enlarged  ... 
doi:10.1109/hldvt.2006.319979 dblp:conf/hldvt/Bertacco06 fatcat:bujxp55hwjeaxcjq6mk5d76wnu

Testing automation systems by means of model checking

Igor Buzhinsky, Valeriy Vyatkin
2017 2017 22nd IEEE International Conference on Emerging Technologies and Factory Automation (ETFA)  
The developed approach is applied in closed-loop verification.  ...  Behavior traces were collected from these FSMs using random walks: for each FSM, ten traces were recorded with a total length of 50|S|.  ...  These criteria are much less elaborate than the ones tried in related work [19, 80] , but their simplicity keeps the computational complexity of the approach below the one of model checking.  ... 
doi:10.1109/etfa.2017.8247579 dblp:conf/etfa/BuzhinskyV17a fatcat:vbsgbhivbbe2tn2qpava3qmcfm

Integration of Coordination Architecture and Behavior Fuzzy Learning in Quadruped Walking Robots

Dongbing Gu, Huosheng Hu
2007 IEEE Transactions on Systems Man and Cybernetics Part C (Applications and Reviews)  
This paper presents the design and implementation of a coordination architecture for quadruped walking robots to learn and execute soccer-playing behaviors.  ...  The deliberative reasoning represents temporal constraints of a robot's strategy in terms of finite state machines.  ...  He was the Conference Chairman for the 1st European Embedded Systems Conference, Paris, in 1996, and has been a member of the Program Committees for a number of international conferences such as IASTED  ... 
doi:10.1109/tsmcc.2007.897491 fatcat:uww6esskkbf6vhe4r7ezetsgxm

Systematic Testing of Multicast Routing Protocols: Analysis of Forward and Backward Search Techniques [article]

Ahmed Helmy, Deborah Estrin, Sandeep Gupta
2000 arXiv   pre-print
The two approaches investigated in this study are based on forward and backward search techniques. We use an extended finite state machine (FSM) model of the protocol.  ...  Using domain-specific information for multicast routing over LANs, the algorithm complexity is reduced from exponential to polynomial in the number of routers.  ...  avoiding the exhaustive walk of the state space.  ... 
arXiv:cs/0007005v1 fatcat:cxqw5m3jcvelri4w3c2qnfmgxq

Verifiable Parameterised Behaviour Models - For Robotic and Embedded Systems

Vladimir Estivill-Castro, René Hexel
2018 Proceedings of the 6th International Conference on Model-Driven Engineering and Software Development  
We achieve the parameterisation of behaviour models analogous to a procedural abstraction and discuss its advantages and disadvantages on formal verification.  ...  This capacity has enabled effective formal verification. Moreover, LLFSMs are very powerful tools for Model-Driven Software Engineering of the behaviour of robotic and embedded systems.  ...  However, when finding the ball during Play, it is important to alternate with walking backwards or forwards to avoid missing the ball in a "dead spot".  ... 
doi:10.5220/0006573903640371 dblp:conf/modelsward/Estivill-Castro18 fatcat:xjctlcw5rraxzow4l2ig3em7ti

Verifying self-adaptive applications suffering uncertainty

Wenhua Yang, Chang Xu, Yepang Liu, Chun Cao, Xiaoxing Ma, Jian Lu
2014 Proceedings of the 29th ACM/IEEE international conference on Automated software engineering - ASE '14  
We experimentally evaluated our approach with real-life self-adaptive applications, and the experimental results confirmed its effectiveness.  ...  In this paper, we address this problem by proposing a novel approach to verifying self-adaptive applications suffering uncertainty in their environmental interactions.  ...  In addition to environmental interactions, we also plan to extend our consideration of uncertainty to those from other sources, such as requirements and adaptation decisions. ACKNOWLEDGMENTS  ... 
doi:10.1145/2642937.2642999 dblp:conf/kbse/YangXLCML14 fatcat:flyc2ggzqncmrhyxvvtosppmve

Numerical Coverage Estimation for the Symbolic Simulation of Real-Time Systems [article]

Farn Wang, Geng-Dian Hwang, Fang Yu
2003 arXiv   pre-print
Three numerical coverage metrics for the symbolic simulation of dense-time systems and their estimation methods are presented.  ...  Properties of the metrics are also discussed with respect to four criteria. Implementation and experiments are then reported.  ...  This Conclusion Symbolic simulation combines the advantages of both simulation and formal verification and can be an important verification approach before fully automatic formal verification becomes  ... 
arXiv:cs/0303027v1 fatcat:6tdk2wcyljfmrgrmjwfezumu2u

Stepping forward with interpolants in unbounded model checking

Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
2006 Computer-Aided Design (ICCAD), IEEE International Conference on  
They show how the methodology is able to extend the applicability of interpolant based Model Checking to larger and deeper verification instances.  ...  First of all, we introduce interpolant-based dynamic abstraction to reduce the support of the computed interpolant. Second, we propose new advances in interpolant compaction by redundancy removal.  ...  McMillan for the source descriptions of the Sun PicoJava II microprocessor, and the VTT group of the STMicroelectronics, Agrate, Italy, for their industrial benchmarks.  ... 
doi:10.1145/1233501.1233661 dblp:conf/iccad/CabodiMNQ06 fatcat:2rekd42g75gtlc5ca5lbf7avam

Stepping Forward with Interpolants in Unbounded Model Checking

Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
2006 Computer-Aided Design (ICCAD), IEEE International Conference on  
They show how the methodology is able to extend the applicability of interpolant based Model Checking to larger and deeper verification instances.  ...  First of all, we introduce interpolant-based dynamic abstraction to reduce the support of the computed interpolant. Second, we propose new advances in interpolant compaction by redundancy removal.  ...  McMillan for the source descriptions of the Sun PicoJava II microprocessor, and the VTT group of the STMicroelectronics, Agrate, Italy, for their industrial benchmarks.  ... 
doi:10.1109/iccad.2006.320119 fatcat:np5rt5pqhbdtbjkzwtvkl46kfy

On the Use of Uniform Random Generation of Automata for Testing

Frédéric Dadeau, Jocelyn Levrey, Pierre-Cyrille Héam
2009 Electronical Notes in Theoretical Computer Science  
The main contribution is to show how to combine two major testing approaches: model-based testing and random testing.  ...  We also illustrate how the power of random testing, applied on a Chinese Postman Problem implementation, points out an error in a well-known algorithm.  ...  In this context, two complementary approaches address this problem: verification and testing.  ... 
doi:10.1016/j.entcs.2009.09.050 fatcat:ryqvlgthtjcchahfar6wo37udi
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